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https://github.com/TomHarte/CLK.git
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Plumbed through to allow interrupt tests, wrote an NMI test, corrected the error revealed.
This commit is contained in:
Thomas Harte
parent
a2ec902773
commit
3e9212aaff
@ -8,6 +8,7 @@
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/* Begin PBXBuildFile section */
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4B049CDD1DA3C82F00322067 /* BCDTest.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B049CDC1DA3C82F00322067 /* BCDTest.swift */; };
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4B08A2751EE35D56008B7065 /* Z80InterruptTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B08A2741EE35D56008B7065 /* Z80InterruptTests.swift */; };
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4B0BE4281D3481E700D5256B /* DigitalPhaseLockedLoop.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0BE4261D3481E700D5256B /* DigitalPhaseLockedLoop.cpp */; };
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4B0CCC451C62D0B3001CAC5F /* CRT.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0CCC421C62D0B3001CAC5F /* CRT.cpp */; };
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4B121F951E05E66800BFDA12 /* PCMPatchedTrackTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4B121F941E05E66800BFDA12 /* PCMPatchedTrackTests.mm */; };
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@ -442,6 +443,7 @@
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/* Begin PBXFileReference section */
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4B046DC31CFE651500E9E45E /* CRTMachine.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = CRTMachine.hpp; sourceTree = "<group>"; };
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4B049CDC1DA3C82F00322067 /* BCDTest.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = BCDTest.swift; sourceTree = "<group>"; };
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4B08A2741EE35D56008B7065 /* Z80InterruptTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = Z80InterruptTests.swift; sourceTree = "<group>"; };
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4B0B6E121C9DBD5D00FFB60D /* CRTConstants.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = CRTConstants.hpp; sourceTree = "<group>"; };
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4B0BE4261D3481E700D5256B /* DigitalPhaseLockedLoop.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DigitalPhaseLockedLoop.cpp; sourceTree = "<group>"; };
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4B0BE4271D3481E700D5256B /* DigitalPhaseLockedLoop.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = DigitalPhaseLockedLoop.hpp; sourceTree = "<group>"; };
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@ -1795,6 +1797,7 @@
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4BBF49AE1ED2880200AB3669 /* FUSETests.swift */,
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4B1414611B58888700E04248 /* KlausDormannTests.swift */,
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4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */,
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4B08A2741EE35D56008B7065 /* Z80InterruptTests.swift */,
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4BFCA12A1ECBE7C400AC40C1 /* ZexallTests.swift */,
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4B3BA0C41D318B44005DD7A7 /* Bridges */,
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4B1414631B588A1100E04248 /* Test Binaries */,
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@ -2599,6 +2602,7 @@
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4BC9E1EE1D23449A003FCEE4 /* 6502InterruptTests.swift in Sources */,
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4BEF6AAA1D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm in Sources */,
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4B924E991E74D22700B76AF1 /* AtariStaticAnalyserTests.mm in Sources */,
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4B08A2751EE35D56008B7065 /* Z80InterruptTests.swift in Sources */,
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4BFCA1241ECBDCB400AC40C1 /* AllRAMProcessor.cpp in Sources */,
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4B50730A1DDFCFDF00C48FBD /* ArrayBuilderTests.mm in Sources */,
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4BBF49AF1ED2880200AB3669 /* FUSETests.swift in Sources */,
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@ -66,4 +66,7 @@ typedef NS_ENUM(NSInteger, CSTestMachineZ80Register) {
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@property(nonatomic, readonly) BOOL isHalted;
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@property(nonatomic) BOOL nmiLine;
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@property(nonatomic) BOOL irqLine;
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@end
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@ -173,6 +173,16 @@ static CPU::Z80::Register registerForRegister(CSTestMachineZ80Register reg) {
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return _processor->get_halt_line() ? YES : NO;
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}
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- (void)setNmiLine:(BOOL)nmiLine {
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_nmiLine = nmiLine;
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_processor->set_non_maskable_interrupt_line(nmiLine ? true : false);
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}
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- (void)setIrqLine:(BOOL)irqLine {
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_irqLine = irqLine;
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_processor->set_interrupt_line(irqLine ? true : false);
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}
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#pragma mark - Z80-specific Runner
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- (void)runToNextInstruction {
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45
OSBindings/Mac/Clock SignalTests/Z80InterruptTests.swift
Normal file
45
OSBindings/Mac/Clock SignalTests/Z80InterruptTests.swift
Normal file
@ -0,0 +1,45 @@
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//
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// Z80InterruptTests.swift
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// Clock Signal
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//
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// Created by Thomas Harte on 03/06/2017.
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// Copyright © 2017 Thomas Harte. All rights reserved.
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//
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import XCTest
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class Z80InterruptTests: XCTestCase {
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func testNMI() {
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let machine = CSTestMachineZ80()
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// start the PC at 0x0100 and install two NOPs for it
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machine.setValue(0x0100, for: .programCounter)
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machine.setValue(0, for: .IFF1)
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machine.setValue(1, for: .IFF2)
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machine.setValue(0x00, atAddress: 0x0100)
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machine.setValue(0x00, atAddress: 0x0101)
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// put the stack at the top of memory
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machine.setValue(0, for: .stackPointer)
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// run for four cycles, and signal an NMI
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machine.runForNumber(ofCycles: 4)
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machine.nmiLine = true
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// run for four more cycles to get to where the NMI should be recognised
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machine.runForNumber(ofCycles: 4)
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XCTAssertEqual(machine.value(for: .programCounter), 0x0102)
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// run for eleven more cycles to allow the NMI to begin
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machine.runForNumber(ofCycles: 11)
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// confirm that the PC is now at 0x66, that the old is on the stack and
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// that IFF1 has migrated to IFF2
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XCTAssertEqual(machine.value(for: .programCounter), 0x66)
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XCTAssertEqual(machine.value(atAddress: 0xffff), 0x01)
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XCTAssertEqual(machine.value(atAddress: 0xfffe), 0x02)
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XCTAssertEqual(machine.value(for: .IFF2), 0)
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}
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}
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@ -136,6 +136,7 @@ struct MicroOp {
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BeginIRQ,
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BeginIRQMode0,
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RETN,
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JumpTo66,
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HALT,
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DJNZ,
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@ -701,6 +702,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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{ MicroOp::BeginNMI },
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{ MicroOp::BusOperation, nullptr, nullptr, {ReadOpcode, 5, &pc_.full, &operation_}},
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PUSH(pc_),
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{ MicroOp::JumpTo66, nullptr, nullptr},
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{ MicroOp::MoveToNextProgram }
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};
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MicroOp irq_mode0_program[] = {
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@ -1476,6 +1478,10 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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request_status_ &= ~Interrupt::IRQ;
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break;
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case MicroOp::JumpTo66:
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pc_.full = 0x66;
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break;
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case MicroOp::RETN:
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iff1_ = iff2_;
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if(irq_line_ && iff1_) request_status_ |= Interrupt::IRQ;
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@ -74,6 +74,14 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public Processor<Concrete
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void reset_power_on() {
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return CPU::Z80::Processor<ConcreteAllRAMProcessor>::reset_power_on();
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}
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void set_interrupt_line(bool value) {
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CPU::Z80::Processor<ConcreteAllRAMProcessor>::set_interrupt_line(value);
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}
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void set_non_maskable_interrupt_line(bool value) {
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CPU::Z80::Processor<ConcreteAllRAMProcessor>::set_non_maskable_interrupt_line(value);
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}
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};
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}
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@ -33,6 +33,8 @@ class AllRAMProcessor:
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virtual void set_value_of_register(Register r, uint16_t value) = 0;
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virtual bool get_halt_line() = 0;
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virtual void reset_power_on() = 0;
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virtual void set_interrupt_line(bool value) = 0;
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virtual void set_non_maskable_interrupt_line(bool value) = 0;
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protected:
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MemoryAccessDelegate *delegate_;
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