6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-14 13:33:42 +00:00
Code Issues Projects Releases Wiki Activity

Implements MEMPTR for IN.

Browse Source
This commit is contained in:
Thomas Harte 2020-02-23 00:32:33 -05:00
parent 989628a024
commit 3f3229851b
4 changed files with 10 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift
View File

@ -90,6 +90,7 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
func testMemptr() {
runTest("z80memptr")
// Result: 102 of 152 tests failed.
}
func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) {
@ -110,6 +111,7 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
let textToAppend = UnicodeScalar(characterCode)!
output += String(textToAppend)
// print(textToAppend, terminator:"")
case 0x7003:
done = true

6
OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift
View File

@ -279,18 +279,22 @@ class Z80MemptrTests: XCTestCase {
*/
/* TODO:
JP(except JP rp)/CALL addr (even in case of conditional call/jp, independantly on condition satisfied or not)
JP(except JP rp)/CALL addr (even in case of conditional call/jp, independently on condition satisfied or not)
MEMPTR = addr
*/
/* TODO:
IN A,(port)
MEMPTR = (A_before_operation << 8) + port + 1
(implemented, not tested)
*/
/* TODO:
IN A,(C)
MEMPTR = BC + 1
(implemented, not tested)
*/
/* TODO:

2
Processors/Z80/Implementation/Z80Implementation.hpp
View File

@ -804,6 +804,7 @@ template < class T,
sign_result_ = zero_result_ = bit53_result_ = *static_cast<uint8_t *>(operation->source);
set_parity(sign_result_);
set_did_compute_flags();
memptr_.full = bc_.full + 1;
break;
case MicroOp::SetAFlags:
@ -840,6 +841,7 @@ template < class T,
case MicroOp::RETN:
iff1_ = iff2_;
if(irq_line_ && iff1_) request_status_ |= Interrupt::IRQ;
memptr_ = pc_;
break;
case MicroOp::HALT:

2
Processors/Z80/Implementation/Z80Storage.cpp
View File

@ -487,7 +487,7 @@ void ProcessorStorage::assemble_base_page(InstructionPage &target, RegisterPair1
/* 0xd6 SUB n */ StdInstr(ReadInc(pc_, temp8_), {MicroOp::SUB8, &temp8_}),
/* 0xd7 RST 10h */ RST(),
/* 0xd8 RET C */ RET(TestC), /* 0xd9 EXX */ StdInstr({MicroOp::EXX}),
/* 0xda JP C */ JP(TestC), /* 0xdb IN A, (n) */StdInstr(ReadInc(pc_, temp16_.halves.low), {MicroOp::Move8, &a_, &temp16_.halves.high}, Input(temp16_, a_)),
/* 0xda JP C */ JP(TestC), /* 0xdb IN A, (n) */StdInstr(ReadInc(pc_, memptr_.halves.low), {MicroOp::Move8, &a_, &memptr_.halves.high}, Input(memptr_, a_), Inc16(memptr_)),
/* 0xdc CALL C */ CALL(TestC), /* 0xdd [DD page] */StdInstr({MicroOp::SetInstructionPage, &dd_page_}),
/* 0xde SBC A, n */ StdInstr(ReadInc(pc_, temp8_), {MicroOp::SBC8, &temp8_}),
/* 0xdf RST 18h */ RST(),