From 3f3229851b84feffe95f8ee1533c19894ea215b5 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 23 Feb 2020 00:32:33 -0500 Subject: [PATCH] Implements MEMPTR for IN. --- OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift | 2 ++ OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift | 6 +++++- Processors/Z80/Implementation/Z80Implementation.hpp | 2 ++ Processors/Z80/Implementation/Z80Storage.cpp | 2 +- 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift b/OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift index c0e419ea5..9f9250605 100644 --- a/OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift +++ b/OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift @@ -90,6 +90,7 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler { func testMemptr() { runTest("z80memptr") + // Result: 102 of 152 tests failed. } func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) { @@ -110,6 +111,7 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler { let textToAppend = UnicodeScalar(characterCode)! output += String(textToAppend) +// print(textToAppend, terminator:"") case 0x7003: done = true diff --git a/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift b/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift index 7ef2513f4..8a815c6d5 100644 --- a/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift +++ b/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift @@ -279,18 +279,22 @@ class Z80MemptrTests: XCTestCase { */ /* TODO: - JP(except JP rp)/CALL addr (even in case of conditional call/jp, independantly on condition satisfied or not) + JP(except JP rp)/CALL addr (even in case of conditional call/jp, independently on condition satisfied or not) MEMPTR = addr */ /* TODO: IN A,(port) MEMPTR = (A_before_operation << 8) + port + 1 + + (implemented, not tested) */ /* TODO: IN A,(C) MEMPTR = BC + 1 + + (implemented, not tested) */ /* TODO: diff --git a/Processors/Z80/Implementation/Z80Implementation.hpp b/Processors/Z80/Implementation/Z80Implementation.hpp index 7ef132313..12d52e834 100644 --- a/Processors/Z80/Implementation/Z80Implementation.hpp +++ b/Processors/Z80/Implementation/Z80Implementation.hpp @@ -804,6 +804,7 @@ template < class T, sign_result_ = zero_result_ = bit53_result_ = *static_cast(operation->source); set_parity(sign_result_); set_did_compute_flags(); + memptr_.full = bc_.full + 1; break; case MicroOp::SetAFlags: @@ -840,6 +841,7 @@ template < class T, case MicroOp::RETN: iff1_ = iff2_; if(irq_line_ && iff1_) request_status_ |= Interrupt::IRQ; + memptr_ = pc_; break; case MicroOp::HALT: diff --git a/Processors/Z80/Implementation/Z80Storage.cpp b/Processors/Z80/Implementation/Z80Storage.cpp index e18836614..ed45f6d9a 100644 --- a/Processors/Z80/Implementation/Z80Storage.cpp +++ b/Processors/Z80/Implementation/Z80Storage.cpp @@ -487,7 +487,7 @@ void ProcessorStorage::assemble_base_page(InstructionPage &target, RegisterPair1 /* 0xd6 SUB n */ StdInstr(ReadInc(pc_, temp8_), {MicroOp::SUB8, &temp8_}), /* 0xd7 RST 10h */ RST(), /* 0xd8 RET C */ RET(TestC), /* 0xd9 EXX */ StdInstr({MicroOp::EXX}), - /* 0xda JP C */ JP(TestC), /* 0xdb IN A, (n) */StdInstr(ReadInc(pc_, temp16_.halves.low), {MicroOp::Move8, &a_, &temp16_.halves.high}, Input(temp16_, a_)), + /* 0xda JP C */ JP(TestC), /* 0xdb IN A, (n) */StdInstr(ReadInc(pc_, memptr_.halves.low), {MicroOp::Move8, &a_, &memptr_.halves.high}, Input(memptr_, a_), Inc16(memptr_)), /* 0xdc CALL C */ CALL(TestC), /* 0xdd [DD page] */StdInstr({MicroOp::SetInstructionPage, &dd_page_}), /* 0xde SBC A, n */ StdInstr(ReadInc(pc_, temp8_), {MicroOp::SBC8, &temp8_}), /* 0xdf RST 18h */ RST(),