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https://github.com/TomHarte/CLK.git
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Pretending the Disk II is an IWM doesn't seem to achieve much.
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@ -16,6 +16,7 @@
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#include "../../../Processors/68000/68000.hpp"
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#include "../../../Processors/68000/68000.hpp"
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#include "../../../Components/6522/6522.hpp"
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#include "../../../Components/6522/6522.hpp"
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#include "../../../Components/DiskII/DiskII.hpp"
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#include "../../Utility/MemoryPacker.hpp"
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#include "../../Utility/MemoryPacker.hpp"
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@ -31,7 +32,8 @@ class ConcreteMachine:
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mc68000_(*this),
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mc68000_(*this),
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video_(ram_.data()),
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video_(ram_.data()),
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via_(via_port_handler_),
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via_(via_port_handler_),
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via_port_handler_(*this) {
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via_port_handler_(*this),
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iwm_(7833600) {
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// Grab a copy of the ROM and convert it into big-endian data.
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// Grab a copy of the ROM and convert it into big-endian data.
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const auto roms = rom_fetcher("Macintosh", { "mac128k.rom" });
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const auto roms = rom_fetcher("Macintosh", { "mac128k.rom" });
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@ -69,6 +71,9 @@ class ConcreteMachine:
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// SCC is a divide-by-two.
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// SCC is a divide-by-two.
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// The IWM runs at the native rate. (TODO: almost everything here).
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iwm_.run_for(cycle.length.cycles());
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// A null cycle leaves nothing else to do.
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// A null cycle leaves nothing else to do.
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if(cycle.operation) {
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if(cycle.operation) {
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auto word_address = cycle.word_address();
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auto word_address = cycle.word_address();
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@ -86,7 +91,6 @@ class ConcreteMachine:
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case 0x77f0ff:
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case 0x77f0ff:
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// VIA accesses are via address 0xefe1fe + register*512,
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// VIA accesses are via address 0xefe1fe + register*512,
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// which at word precision is 0x77f0ff + register*256.
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// which at word precision is 0x77f0ff + register*256.
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// printf("VIA");
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if(cycle.operation & Microcycle::Read) {
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = via_.get_register(register_address);
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cycle.value->halves.low = via_.get_register(register_address);
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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@ -97,7 +101,12 @@ class ConcreteMachine:
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case 0x6ff0ff:
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case 0x6ff0ff:
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// IWM
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// IWM
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// printf("IWM %d", register_address & 0xf);
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = iwm_.read_address(register_address);
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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} else {
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iwm_.set_data_input(cycle.value->halves.low);
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}
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break;
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break;
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}
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}
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@ -252,6 +261,9 @@ class ConcreteMachine:
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MOS::MOS6522::MOS6522<VIAPortHandler> via_;
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MOS::MOS6522::MOS6522<VIAPortHandler> via_;
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VIAPortHandler via_port_handler_;
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VIAPortHandler via_port_handler_;
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Apple::DiskII iwm_;
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HalfCycles via_clock_;
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HalfCycles via_clock_;
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HalfCycles time_since_video_update_;
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HalfCycles time_since_video_update_;
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