6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-12 00:30:31 +00:00
Code Issues Projects Releases Wiki Activity

Merge branch 'master' into 68000

Browse Source
This commit is contained in:
Thomas Harte 2019-04-26 00:02:35 -04:00
commit 40b2fe7339
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Processors/Z80/Z80.hpp
View File

@ -98,7 +98,7 @@ struct PartialMachineCycle {
const HalfCycles length;
/// The current value of the address bus.
const uint16_t *const address;
/// If the Z80 is outputting to the data bus, a pointer to that value. Otherwise, a pointer to the lcoation where the current data bus value should be placed.
/// If the Z80 is outputting to the data bus, a pointer to that value. Otherwise, a pointer to the location where the current data bus value should be placed.
uint8_t *const value;
/// @c true if this operation is occurring only because of an external request; @c false otherwise.
const bool was_requested;
@ -131,7 +131,7 @@ struct PartialMachineCycle {
/*!
A class providing empty implementations of the methods a Z80 uses to access the bus. To wire the Z80 to a bus,
machines should subclass BusHandler and then declare a realisation of the Z80 template, suplying their bus
machines should subclass BusHandler and then declare a realisation of the Z80 template, supplying their bus
handler.
*/
class BusHandler {
@ -149,7 +149,7 @@ class BusHandler {
}
/*!
Announces completion of all the cycles supplied to a .run_for request on the 6502. Intended to allow
Announces completion of all the cycles supplied to a .run_for request on the Z80. Intended to allow
bus handlers to perform any deferred output work.
*/
void flush() {}