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Made an attempt at NMI usurption of IRQ/BRK.
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@ -92,7 +92,11 @@ template <class T> class Processor {
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enum MicroOp {
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CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH,
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CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand,
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CycleSetIReadBRKLow, CycleReadBRKHigh,
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OperationSetI,
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OperationBRKPickVector, OperationNMIPickVector, OperationRSTPickVector,
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CycleReadVectorLow, CycleReadVectorHigh,
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CycleReadFromS, CycleReadFromPC,
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CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA,
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CycleNoWritePush,
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@ -122,7 +126,6 @@ template <class T> class Processor {
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OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet,
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OperationSetOperandFromFlags,
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OperationSetFlagsFromA,
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CycleReadRSTLow, CycleReadRSTHigh, CycleReadNMILow, CycleReadNMIHigh,
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CycleScheduleJam
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};
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@ -272,7 +275,7 @@ template <class T> class Processor {
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static const MicroOp operations[256][10] = {
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/* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, CycleSetIReadBRKLow, CycleReadBRKHigh),
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/* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationBRKPickVector, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, OperationSetI, CycleReadVectorLow, CycleReadVectorHigh),
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/* 0x01 ORA x, ind */ IndexedIndirectRead(OperationORA),
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/* 0x02 JAM */ JAM, /* 0x03 ASO x, ind */ IndexedIndirectReadModifyWrite(OperationASO),
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/* 0x04 NOP zpg */ ZeroNop(), /* 0x05 ORA zpg */ ZeroRead(OperationORA),
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@ -481,9 +484,10 @@ template <class T> class Processor {
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CycleFetchOperand,
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CycleNoWritePush,
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CycleNoWritePush,
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OperationRSTPickVector,
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CycleNoWritePush,
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CycleReadRSTLow,
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CycleReadRSTHigh,
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CycleReadVectorLow,
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CycleReadVectorHigh,
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OperationMoveToNextProgram
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};
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return reset;
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@ -500,10 +504,12 @@ template <class T> class Processor {
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CycleFetchOperand,
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CyclePushPCH,
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CyclePushPCL,
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OperationBRKPickVector,
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OperationSetOperandFromFlags,
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CyclePushOperand,
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CycleSetIReadBRKLow,
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CycleReadBRKHigh,
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OperationSetI,
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CycleReadVectorLow,
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CycleReadVectorHigh,
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OperationMoveToNextProgram
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};
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return reset;
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@ -520,10 +526,11 @@ template <class T> class Processor {
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CycleFetchOperand,
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CyclePushPCH,
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CyclePushPCL,
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OperationNMIPickVector,
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OperationSetOperandFromFlags,
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CyclePushOperand,
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CycleReadNMILow,
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CycleReadNMIHigh,
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CycleReadVectorLow,
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CycleReadVectorHigh,
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OperationMoveToNextProgram
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};
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return reset;
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@ -693,12 +700,16 @@ template <class T> class Processor {
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case CycleReadFromS: throwaway_read(_s | 0x100); break;
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case CycleReadFromPC: throwaway_read(_pc.full); break;
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case CycleReadNMILow: read_mem(_pc.bytes.low, 0xfffa); break;
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case CycleReadNMIHigh: read_mem(_pc.bytes.high, 0xfffb); break;
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case CycleReadRSTLow: read_mem(_pc.bytes.low, 0xfffc); break;
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case CycleReadRSTHigh: read_mem(_pc.bytes.high, 0xfffd); break;
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case CycleSetIReadBRKLow: _interruptFlag = Flag::Interrupt; read_mem(_pc.bytes.low, 0xfffe); break;
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case CycleReadBRKHigh: read_mem(_pc.bytes.high, 0xffff); break;
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case OperationBRKPickVector:
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// NMI can usurp BRK-vector operations
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nextAddress.full = (_interrupt_requests & InterruptRequestFlags::NMI) ? 0xfffa : 0xfffe;
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_interrupt_requests &= ~InterruptRequestFlags::NMI; // TODO: this probably doesn't happen now?
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break;
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case OperationNMIPickVector: nextAddress.full = 0xfffa; break;
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case OperationRSTPickVector: nextAddress.full = 0xfffc; break;
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case CycleReadVectorLow: read_mem(_pc.bytes.low, nextAddress.full); break;
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case CycleReadVectorHigh: read_mem(_pc.bytes.high, nextAddress.full+1); break;
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case OperationSetI: _interruptFlag = Flag::Interrupt; break;
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case CyclePullPCL: _s++; read_mem(_pc.bytes.low, _s | 0x100); break;
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case CyclePullPCH: _s++; read_mem(_pc.bytes.high, _s | 0x100); break;
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