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Made an attempt at NMI usurption of IRQ/BRK.

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This commit is contained in:
Thomas Harte
2016-06-29 20:59:45 -04:00
parent c02226bc41
commit 41809d4597
1 changed files with 26 additions and 15 deletions
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41
Processors/6502/CPU6502.hpp
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@@ -92,7 +92,11 @@ template <class T> class Processor {
enum MicroOp { enum MicroOp {
CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH, CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH,
CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand, CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand,
CycleSetIReadBRKLow, CycleReadBRKHigh, OperationSetI,
OperationBRKPickVector, OperationNMIPickVector, OperationRSTPickVector,
CycleReadVectorLow, CycleReadVectorHigh,
CycleReadFromS, CycleReadFromPC, CycleReadFromS, CycleReadFromPC,
CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA, CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA,
CycleNoWritePush, CycleNoWritePush,
@@ -122,7 +126,6 @@ template <class T> class Processor {
OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet, OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet,
OperationSetOperandFromFlags, OperationSetOperandFromFlags,
OperationSetFlagsFromA, OperationSetFlagsFromA,
CycleReadRSTLow, CycleReadRSTHigh, CycleReadNMILow, CycleReadNMIHigh,
CycleScheduleJam CycleScheduleJam
}; };
@@ -272,7 +275,7 @@ template <class T> class Processor {
static const MicroOp operations[256][10] = { static const MicroOp operations[256][10] = {
/* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, CycleSetIReadBRKLow, CycleReadBRKHigh), /* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationBRKPickVector, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, OperationSetI, CycleReadVectorLow, CycleReadVectorHigh),
/* 0x01 ORA x, ind */ IndexedIndirectRead(OperationORA), /* 0x01 ORA x, ind */ IndexedIndirectRead(OperationORA),
/* 0x02 JAM */ JAM, /* 0x03 ASO x, ind */ IndexedIndirectReadModifyWrite(OperationASO), /* 0x02 JAM */ JAM, /* 0x03 ASO x, ind */ IndexedIndirectReadModifyWrite(OperationASO),
/* 0x04 NOP zpg */ ZeroNop(), /* 0x05 ORA zpg */ ZeroRead(OperationORA), /* 0x04 NOP zpg */ ZeroNop(), /* 0x05 ORA zpg */ ZeroRead(OperationORA),
@@ -481,9 +484,10 @@ template <class T> class Processor {
CycleFetchOperand, CycleFetchOperand,
CycleNoWritePush, CycleNoWritePush,
CycleNoWritePush, CycleNoWritePush,
OperationRSTPickVector,
CycleNoWritePush, CycleNoWritePush,
CycleReadRSTLow, CycleReadVectorLow,
CycleReadRSTHigh, CycleReadVectorHigh,
OperationMoveToNextProgram OperationMoveToNextProgram
}; };
return reset; return reset;
@@ -500,10 +504,12 @@ template <class T> class Processor {
CycleFetchOperand, CycleFetchOperand,
CyclePushPCH, CyclePushPCH,
CyclePushPCL, CyclePushPCL,
OperationBRKPickVector,
OperationSetOperandFromFlags, OperationSetOperandFromFlags,
CyclePushOperand, CyclePushOperand,
CycleSetIReadBRKLow, OperationSetI,
CycleReadBRKHigh, CycleReadVectorLow,
CycleReadVectorHigh,
OperationMoveToNextProgram OperationMoveToNextProgram
}; };
return reset; return reset;
@@ -520,10 +526,11 @@ template <class T> class Processor {
CycleFetchOperand, CycleFetchOperand,
CyclePushPCH, CyclePushPCH,
CyclePushPCL, CyclePushPCL,
OperationNMIPickVector,
OperationSetOperandFromFlags, OperationSetOperandFromFlags,
CyclePushOperand, CyclePushOperand,
CycleReadNMILow, CycleReadVectorLow,
CycleReadNMIHigh, CycleReadVectorHigh,
OperationMoveToNextProgram OperationMoveToNextProgram
}; };
return reset; return reset;
@@ -693,12 +700,16 @@ template <class T> class Processor {
case CycleReadFromS: throwaway_read(_s | 0x100); break; case CycleReadFromS: throwaway_read(_s | 0x100); break;
case CycleReadFromPC: throwaway_read(_pc.full); break; case CycleReadFromPC: throwaway_read(_pc.full); break;
case CycleReadNMILow: read_mem(_pc.bytes.low, 0xfffa); break; case OperationBRKPickVector:
case CycleReadNMIHigh: read_mem(_pc.bytes.high, 0xfffb); break; // NMI can usurp BRK-vector operations
case CycleReadRSTLow: read_mem(_pc.bytes.low, 0xfffc); break; nextAddress.full = (_interrupt_requests & InterruptRequestFlags::NMI) ? 0xfffa : 0xfffe;
case CycleReadRSTHigh: read_mem(_pc.bytes.high, 0xfffd); break; _interrupt_requests &= ~InterruptRequestFlags::NMI; // TODO: this probably doesn't happen now?
case CycleSetIReadBRKLow: _interruptFlag = Flag::Interrupt; read_mem(_pc.bytes.low, 0xfffe); break; break;
case CycleReadBRKHigh: read_mem(_pc.bytes.high, 0xffff); break; case OperationNMIPickVector: nextAddress.full = 0xfffa; break;
case OperationRSTPickVector: nextAddress.full = 0xfffc; break;
case CycleReadVectorLow: read_mem(_pc.bytes.low, nextAddress.full); break;
case CycleReadVectorHigh: read_mem(_pc.bytes.high, nextAddress.full+1); break;
case OperationSetI: _interruptFlag = Flag::Interrupt; break;
case CyclePullPCL: _s++; read_mem(_pc.bytes.low, _s | 0x100); break; case CyclePullPCL: _s++; read_mem(_pc.bytes.low, _s | 0x100); break;
case CyclePullPCH: _s++; read_mem(_pc.bytes.high, _s | 0x100); break; case CyclePullPCH: _s++; read_mem(_pc.bytes.high, _s | 0x100); break;