From 4467eb1c41ba447868da6e53e19634ddb8b6f1e4 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Fri, 24 Jun 2022 14:00:03 -0400
Subject: [PATCH] Ensure relevant throwaway stack reads use the previous stack
 address.

TODO: can CycleFetchPreviousThrowaway be used more widely?
---
 .../65816/Implementation/65816Implementation.hpp   |  4 ++++
 Processors/65816/Implementation/65816Storage.cpp   | 14 +++++++-------
 Processors/65816/Implementation/65816Storage.hpp   |  4 +++-
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp
index 7ac380c08..ea07667fd 100644
--- a/Processors/65816/Implementation/65816Implementation.hpp
+++ b/Processors/65816/Implementation/65816Implementation.hpp
@@ -103,6 +103,10 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
 					perform_bus(((registers_.pc - 1) & 0xffff) | registers_.program_bank, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
 				break;
 
+				case CycleFetchPreviousThrowaway:
+					perform_bus(bus_address_, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
+				break;
+
 				//
 				// Data fetches and stores.
 				//
diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp
index ddd9202ec..5249be667 100644
--- a/Processors/65816/Implementation/65816Storage.cpp
+++ b/Processors/65816/Implementation/65816Storage.cpp
@@ -320,7 +320,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
 
 		target(OperationCopyPBRToData);			// Copy PBR to the data register.
 		target(CyclePush);						// PBR.
-		target(CycleAccessStack);				// IO.
+		target(CycleFetchPreviousThrowaway);	// IO.
 
 		target(CycleFetchPC);					// New PBR.
 
@@ -728,14 +728,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
 
 	// 22h. Stack; s, RTS.
 	static void stack_rts(AccessType, bool, const std::function<void(MicroOp)> &target) {
-		target(CycleFetchPCThrowaway);	// IO.
-		target(CycleFetchPCThrowaway);	// IO.
+		target(CycleFetchPCThrowaway);			// IO.
+		target(CycleFetchPCThrowaway);			// IO.
 
-		target(CyclePull);				// PCL.
-		target(CyclePull);				// PCH.
-		target(CycleAccessStack);		// IO.
+		target(CyclePull);						// PCL.
+		target(CyclePull);						// PCH.
+		target(CycleFetchPreviousThrowaway);	// IO.
 
-		target(OperationPerform);		// [RTS]
+		target(OperationPerform);				// [RTS]
 	}
 
 	// 22i. Stack; s, RTL.
diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp
index d2ead050f..bac7fda8b 100644
--- a/Processors/65816/Implementation/65816Storage.hpp
+++ b/Processors/65816/Implementation/65816Storage.hpp
@@ -15,6 +15,8 @@ enum MicroOp: uint8_t {
 	CycleFetchPCThrowaway,
 	/// Fetches a byte from (PC - 1), and throws it away; useful for IO cycles that immediately follow incremented PCs.
 	CycleFetchPreviousPCThrowaway,
+	/// Fetches from whichever address was used in the last bus cycle, and throws away the result.
+	CycleFetchPreviousThrowaway,
 	/// The same as CycleFetchIncrementPC but indicates valid program address rather than valid data address.
 	CycleFetchOpcode,
 
@@ -274,7 +276,7 @@ struct ProcessorStorage {
 		// Registers.
 		RegisterPair16 a;
 		RegisterPair16 x, y;
-		RegisterPair16  s;
+		RegisterPair16 s;
 		uint16_t pc;
 
 		// Flags aplenty.