6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-23 11:30:24 +00:00
Code Issues Projects Releases Wiki Activity

Resolves undefined behaviour of a signed shift left.

Browse Source
This commit is contained in:
Thomas Harte 2018-03-22 21:59:39 -04:00
parent a301964bd0
commit 45be1c19df
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Processors/Z80/Implementation/Z80Storage.hpp
View File

@ -134,9 +134,9 @@ class ProcessorStorage {
uint8_t carry_result_; // the carry flag is set if bit 0 of carry_result_ is set
uint8_t halt_mask_ = 0xff;
int flag_adjustment_history_ = 0; // a shifting record of whether each opcode set any flags; it turns out
// that knowledge of what the last opcode did is necessary to get bits 5 & 3
// correct for SCF and CCF.
unsigned int flag_adjustment_history_ = 0; // a shifting record of whether each opcode set any flags; it turns out
// that knowledge of what the last opcode did is necessary to get bits 5 & 3
// correct for SCF and CCF.
HalfCycles number_of_cycles_;