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Implement Bcc.

This commit is contained in:
Thomas Harte 2022-05-20 12:04:43 -04:00
parent ce32957d9d
commit 45e9648b8c
3 changed files with 55 additions and 7 deletions

View File

@ -156,7 +156,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
// To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
_fileSet = [NSSet setWithArray:@[
// @"bcc.json",
@"bcc.json",
// Below this line are passing tests.
@"abcd_sbcd.json",
@ -167,7 +167,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
@"dbcc_scc.json",
@"eor_and_or.json",
@"nbcd.json",
@"ext.json"]];
@"ext.json"]]; // 9/32 = ~28% done, as far as the tests go.
// _testSet = [NSSet setWithArray:@[@"ADDQ 05df"]];
}

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@ -91,6 +91,11 @@ enum ExecutionState: int {
DBcc_branch_taken,
DBcc_condition_true,
DBcc_counter_overflow,
Bcc,
Bcc_branch_taken,
Bcc_b_branch_not_taken,
Bcc_w_branch_not_taken,
};
// MARK: - The state machine.
@ -523,6 +528,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
StdCASE(DBcc, perform_state_ = DBcc);
StdCASE(Bccb, perform_state_ = Bcc);
StdCASE(Bccw, perform_state_ = Bcc);
default:
assert(false);
}
@ -962,7 +970,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
//
// Specific forms of perform.
// Specific forms of perform...
//
BeginState(MOVEw):
@ -988,6 +996,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
Prefetch() // np
MoveToState(Decode);
//
// [ABCD/SBCD/SUBX/ADDX] (An)-, (An)-
//
BeginState(TwoOp_Predec_bw):
IdleBus(1); // n
@ -1046,7 +1057,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
//
// CHK
//
BeginState(CHK):
Prefetch(); // np
InstructionSet::M68k::perform<
@ -1079,7 +1089,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
//
// Scc
//
BeginState(Scc_Dn):
Prefetch(); // np
InstructionSet::M68k::perform<
@ -1113,7 +1122,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// Just do the write-back here.
registers_[instruction_.reg(0)].w = operand_[0].w;
// Next state was set by complete_dbcc. Branch to it.
// Next state was set by complete_dbcc.
break;
BeginState(DBcc_branch_taken):
@ -1141,6 +1150,33 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
Prefetch(); // np
MoveToState(Decode);
//
// Bcc [.b and .w]
//
BeginState(Bcc):
InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
// Next state was set by complete_bcc.
break;
BeginState(Bcc_branch_taken):
IdleBus(1); // n
Prefetch(); // np
Prefetch(); // np
MoveToState(Decode);
BeginState(Bcc_b_branch_not_taken):
IdleBus(2); // nn
Prefetch(); // np
MoveToState(Decode);
BeginState(Bcc_w_branch_not_taken):
IdleBus(2); // nn
Prefetch(); // np
Prefetch(); // np
MoveToState(Decode);
//
// Various states TODO.
//
@ -1207,6 +1243,18 @@ void ProcessorBase::complete_dbcc(bool matched_condition, bool overflowed, int16
state_ = DBcc_condition_true;
}
template <typename IntT> void ProcessorBase::complete_bcc(bool take_branch, IntT offset) {
if(take_branch) {
program_counter_.l = instruction_address_.l + uint32_t(offset) + 2;
state_ = Bcc_branch_taken;
return;
}
state_ =
(instruction_.operation == InstructionSet::M68k::Operation::Bccb) ?
Bcc_b_branch_not_taken : Bcc_w_branch_not_taken;
}
// MARK: - External state.
template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>

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@ -108,7 +108,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
template <bool did_overflow> void did_divs(int32_t, int32_t) {}
inline void did_bit_op(int) {}
inline void did_update_status();
template <typename IntT> void complete_bcc(bool, IntT) {}
template <typename IntT> void complete_bcc(bool, IntT);
inline void complete_dbcc(bool, bool, int16_t);
inline void bsr(uint32_t) {}
inline void jsr(uint32_t) {}