6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-14 13:33:42 +00:00
Code Issues Projects Releases Wiki Activity

Ensured bit 8 is uniquely from the latched video byte, not an OR of that with the refresh address.

Browse Source
This commit is contained in:
Thomas Harte 2017-07-06 22:48:48 -04:00
parent a3684545b5
commit 46fff8e8a2
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Machines/ZX8081/ZX8081.cpp
View File

@ -113,7 +113,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
set_interrupt_line(false); set_interrupt_line(false);
} }
if(latched_video_byte_) { if(latched_video_byte_) {
size_t char_address = (size_t)((address & 0xff00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_); size_t char_address = (size_t)((address & 0xfe00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_);
uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff; uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff;
if(char_address < ram_base_) { if(char_address < ram_base_) {
latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask; latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask;
@ -156,7 +156,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
uint8_t value = ram_[address & ram_mask_]; uint8_t value = ram_[address & ram_mask_];
// If this is an M1 cycle reading from above the 32kb mark and HALT is not // If this is an M1 cycle reading from above the 32kb mark and HALT is not
// currently active, perform a video output and return a NOP. Otherwise, // currently active, latch for video output and return a NOP. Otherwise,
// just return the value as read. // just return the value as read.
if(is_opcode_read && address&0x8000 && !(value & 0x40) && !get_halt_line()) { if(is_opcode_read && address&0x8000 && !(value & 0x40) && !get_halt_line()) {
latched_video_byte_ = value; latched_video_byte_ = value;