From 48942848e70de0cc12fa62f1ca603a6576da3e5f Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 20 Jun 2017 21:15:56 -0400 Subject: [PATCH] Fixed (Ix+d) read timing. I've put an extra wait cycle into the read, so no need to extend the refresh. --- Processors/Z80/Z80.hpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Processors/Z80/Z80.hpp b/Processors/Z80/Z80.hpp index 87c54648d..ca208d9f2 100644 --- a/Processors/Z80/Z80.hpp +++ b/Processors/Z80/Z80.hpp @@ -360,14 +360,14 @@ template class Processor { RMWI(a_, op) #define IX_READ_OP_GROUP(op) \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ - Instr(4, Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}) + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}), \ + StdInstr(Read4(INDEX_ADDR(), temp8_), {MicroOp::op, &temp8_}) #define ADD16(d, s) StdInstr(InternalOperation(4), InternalOperation(3), {MicroOp::ADD16, &s.full, &d.full}) #define ADC16(d, s) StdInstr(InternalOperation(4), InternalOperation(3), {MicroOp::ADC16, &s.full, &d.full})