6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-06-26 10:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Nudges 6850 towards coherence.

Browse Source
This commit is contained in:
Thomas Harte 2019-10-12 00:04:02 -04:00
parent 97d44129cb
commit 4b09d7c41d
2 changed files with 38 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
Components/6850/6850.cpp
View File

@ -8,13 +8,31 @@
#include "6850.hpp"
#define LOG_PREFIX "[6850] "
#include "../../Outputs/Log.hpp"
using namespace Motorola::ACIA;
uint8_t ACIA::read(int address) {
return 0xff;
if(address&1) {
LOG("Read from receive register");
} else {
LOG("Read status");
return status_;
}
return 0x00;
}
void ACIA::write(int address, uint8_t value) {
if(address&1) {
LOG("Write to transmit register");
} else {
if((value&3) == 3) {
LOG("Reset");
} else {
LOG("Write to control register");
}
}
}
void ACIA::run_for(HalfCycles) {

19
Components/6850/6850.hpp
View File

@ -17,10 +17,29 @@ namespace ACIA {
class ACIA {
public:
/*!
Reads from the ACIA.
Bit 0 of the address is used as the ACIA's register select line —
so even addresses select control/status registers, odd addresses
select transmit/receive data registers.
*/
uint8_t read(int address);
/*!
Writes to the ACIA.
Bit 0 of the address is used as the ACIA's register select line —
so even addresses select control/status registers, odd addresses
select transmit/receive data registers.
*/
void write(int address, uint8_t value);
void run_for(HalfCycles);
private:
int divider_ = 1;
uint8_t status_ = 0x00;
};
}