From 4bd9c369222f2017afd046bdce4de7f504d8c908 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Fri, 20 May 2022 21:01:23 -0400
Subject: [PATCH] Fix postincrement mode.
---
.../68000Mk2/Implementation/68000Mk2Implementation.hpp | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 55a2d48c6..abfc141ce 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -1595,6 +1595,12 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// Perform one more read, spuriously.
Access(temporary_value_.low); // nr
+ // Write the address back to the register if
+ // this was post-increment mode.
+ if(instruction_.mode(1) == Mode::AddressRegisterIndirectWithPostincrement) {
+ registers_[8 + instruction_.reg(1)].l = effective_address_[1];
+ }
+
Prefetch(); // np
MoveToState(Decode);