6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00
Code Issues Projects Releases Wiki Activity

Sought to ensure that Mode 1 interrupts aren't happening early. Which they seem not to be.

Browse Source
This commit is contained in:
Thomas Harte 2017-06-11 13:30:08 -04:00
parent 256ba4028b
commit 50be3a24fe
1 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
OSBindings/Mac/Clock SignalTests/Z80InterruptTests.swift
View File

@ -135,8 +135,13 @@ class Z80InterruptTests: XCTestCase {
machine.runForNumber(ofCycles: 4)
XCTAssertEqual(machine.value(for: .programCounter), 0x0102)
// run for eleven more cycles to allow the IRQ to begin
machine.runForNumber(ofCycles: 13)
// run for twelve cycles and confirm that the IRQ has yet to begin
machine.runForNumber(ofCycles: 12)
XCTAssertNotEqual(machine.value(for: .programCounter), 0x38)
// run for one more cycles to allow the IRQ to begin
machine.runForNumber(ofCycles: 1)
// confirm that the PC is now at 0x38, that the old is on the stack and
// that interrupts are now disabled