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Exposed the memptr register.

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This commit is contained in:
Thomas Harte 2017-07-21 22:31:42 -04:00
parent a6b239698c
commit 540a03f75c
1 changed files with 7 additions and 1 deletions
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8
Processors/Z80/Z80.hpp
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@ -40,7 +40,9 @@ enum Register {
IYh, IYl, IY, IYh, IYl, IY,
R, I, Refresh, R, I, Refresh,
IFF1, IFF2, IM IFF1, IFF2, IM,
MemPtr
}; };
/* /*
@ -1796,6 +1798,8 @@ template <class T> class Processor {
case Register::IFF2: return iff2_ ? 1 : 0; case Register::IFF2: return iff2_ ? 1 : 0;
case Register::IM: return (uint16_t)interrupt_mode_; case Register::IM: return (uint16_t)interrupt_mode_;
case Register::MemPtr: return memptr_.full;
default: return 0; default: return 0;
} }
} }
@ -1855,6 +1859,8 @@ template <class T> class Processor {
case Register::IFF2: iff2_ = !!value; break; case Register::IFF2: iff2_ = !!value; break;
case Register::IM: interrupt_mode_ = value % 3; break; case Register::IM: interrupt_mode_ = value % 3; break;
case Register::MemPtr: memptr_.full = value; break;
default: break; default: break;
} }
} }