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Adds some form of WAITing to the Copper.
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@ -57,6 +57,12 @@ bool Chipset::Copper::advance(uint16_t position) {
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switch(state_) {
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switch(state_) {
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default: return false;
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default: return false;
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case State::Waiting:
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if(position >= instruction[1]) {
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state_ = State::FetchFirstWord;
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}
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return false;
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case State::FetchFirstWord:
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case State::FetchFirstWord:
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instruction[0] = ram_[address & ram_mask_];
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instruction[0] = ram_[address & ram_mask_];
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++address;
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++address;
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@ -69,6 +75,7 @@ bool Chipset::Copper::advance(uint16_t position) {
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if(!(instruction[0] & 1)) {
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if(!(instruction[0] & 1)) {
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// This is a move.
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// This is a move.
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// TODO: permissions.
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// At least for now, construct a 68000-esque Microcycle.
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// At least for now, construct a 68000-esque Microcycle.
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CPU::MC68000::Microcycle cycle;
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CPU::MC68000::Microcycle cycle;
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cycle.operation = CPU::MC68000::Microcycle::SelectWord;
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cycle.operation = CPU::MC68000::Microcycle::SelectWord;
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@ -77,11 +84,20 @@ bool Chipset::Copper::advance(uint16_t position) {
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cycle.address = &full_address;
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cycle.address = &full_address;
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cycle.value = &data;
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cycle.value = &data;
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chipset_.perform(cycle);
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chipset_.perform(cycle);
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state_ = State::FetchFirstWord;
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state_ = State::FetchFirstWord;
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} else {
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break;
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// TODO: ... decode and handle WAITs and SKIPs.
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state_ = State::Stopped;
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}
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}
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if(!(instruction[1] & 1)) {
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// A WAIT. Just note that this is now waiting.
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state_ = State::Waiting;
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break;
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}
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// TODO: SKIPs.
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LOG("Unhandled Copper instruction " << PADHEX(4) << instruction[0] << " <- " << instruction[1]);
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state_ = State::Stopped;
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break;
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break;
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}
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}
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@ -433,6 +449,15 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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break;
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break;
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// Bitplanes.
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// Bitplanes.
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case Write(0x0e0): case Write(0x0e2):
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case Write(0x0e4): case Write(0x0e6):
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case Write(0x0e8): case Write(0x0ea):
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case Write(0x0ec): case Write(0x0ee):
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case Write(0x0f0): case Write(0x0f2):
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case Write(0x0f4): case Write(0x0f6):
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LOG("TODO: Bitplane pointer; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Write(0x100):
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case Write(0x100):
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case Write(0x102):
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case Write(0x102):
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case Write(0x104):
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case Write(0x104):
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