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Attempts to support stepping and head selection.

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This commit is contained in:
Thomas Harte 2021-10-05 06:36:17 -07:00
parent 647ec770ce
commit 5463cd1ae3
1 changed files with 36 additions and 17 deletions
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35
Machines/Amiga/Chipset.cpp
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@ -1025,7 +1025,7 @@ void Chipset::DiskController::set_mtr_sel_side_dir_step(uint8_t value) {
// b0: /STEP
// Select active drive.
set_drive((value >> 3) & 0xf);
set_drive(((value >> 3) & 0xf) ^ 0xf);
// "[The MTR] signal is nonstandard on the Amiga system.
// Each drive will latch the motor signal at the time its
@ -1035,20 +1035,29 @@ void Chipset::DiskController::set_mtr_sel_side_dir_step(uint8_t value) {
// Check for changes in the SEL line per drive.
const bool motor_on = !(value & 0x80);
const int side = (value & 0x04) ? 0 : 1;
const auto step = Storage::Disk::HeadPosition(
((difference & 0x1) && !(value & 0x1)) ?
((value & 0x02) ? -1 : 1) : 0
);
for(int c = 0; c < 4; c++) {
auto drive = get_drive(size_t(c));
// If drive went from unselected to selected, latch
// the new motor value; if the motor goes active,
// reset the drive ID shift register.
const int select_mask = 0x08 << c;
if(difference & value & select_mask) {
auto drive = get_drive(size_t(c));
// Shift the drive ID value.
if(difference & select_mask) {
// If transitioning to inactive, shift the drive ID value;
// if transitioning to active, possibly reset the drive
// ID and definitely latch the new motor state.
if(value & select_mask) {
drive_ids_[c] <<= 1;
LOG("Shifted drive ID shift register for drive " << +c);
// Motor transition off -> on => reload register.
if(motor_on && !drive.get_motor_on()) {
} else {
// Motor transition on -> off => reload register.
if(!motor_on && drive.get_motor_on()) {
// NB:
// 0xffff'ffff = 3.5" drive;
// 0x5555'5555 = 5.25" drive;
@ -1061,6 +1070,16 @@ void Chipset::DiskController::set_mtr_sel_side_dir_step(uint8_t value) {
drive.set_motor_on(motor_on);
}
}
// Set the new side.
drive.set_head(side);
// Possibly step.
if(step.as_int() && !(value & select_mask)) {
LOG("Stepped drive " << +c << " by " << step.as_int());
drive.step(step);
}
}
}
uint8_t Chipset::DiskController::get_rdy_trk0_wpro_chng() {