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https://github.com/TomHarte/CLK.git
synced 2025-04-09 00:37:27 +00:00
Switch to a fixed output clock; retain addresses.
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@ -109,17 +109,14 @@ struct Video {
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case 0xe0:
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logger.error().append("TODO: video control: %08x", value);
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// Set pixel rate.
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//
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// TODO: possibly do this as a multiplier on position counts and a divider on pixels,
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// to maintain a consistent CRT data clock?
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// Set pixel rate. This is the value that a 24Mhz clock should be divided
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// by to get half the pixel rate.
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switch(value & 0b11) {
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case 0b00: clock_divider_ = 12; break; // 4Mhz count.
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case 0b01: clock_divider_ = 8; break; // 6Mhz count.
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case 0b10: clock_divider_ = 6; break; // 8Mhz count.
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case 0b11: clock_divider_ = 4; break; // i.e. 48/4 = 12Mhz position counting clock.
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case 0b00: clock_divider_ = 6; break; // i.e. pixel clock = 8Mhz.
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case 0b01: clock_divider_ = 4; break; // 12Mhz.
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case 0b10: clock_divider_ = 3; break; // 16Mhz.
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case 0b11: clock_divider_ = 2; break; // 24Mhz.
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}
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sub_clock_ = 0;
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break;
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//
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@ -142,26 +139,16 @@ struct Video {
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}
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void tick() {
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// Apply clock divider to get 8, 12, 16 or 24 Mhz pixel rate as user-selected,
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// which since all event positioning is at two-pixel boundaries means a
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// 4, 6, 8 or 12 Mhz counting clock.
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//
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// tick() is called at 12Mhz.
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sub_clock_ += 4; // Count at 48 Mhz.
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if(sub_clock_ < clock_divider_) {
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return;
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}
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sub_clock_ -= clock_divider_;
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// TODO: real output. For now, just count up to complete frames and pretend a retrace goes there.
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++position_;
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if(position_ >= horizontal_.period * vertical_.period) {
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if(position_ >= horizontal_.period * vertical_.period * clock_divider_) {
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entered_sync_ = true;
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position_ = 0;
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observer_.update_interrupts();
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}
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}
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/// @returns @c true if a vertical retrace interrupt has been signalled since the last call to @c interrupt(); @c false otherwise.
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bool interrupt() {
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// Guess: edge triggered?
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const bool interrupt = entered_sync_;
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@ -169,10 +156,10 @@ struct Video {
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return interrupt;
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}
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void set_frame_start(uint32_t) {}
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void set_buffer_start(uint32_t) {}
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void set_buffer_end(uint32_t) {}
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void set_cursor_start(uint32_t) {}
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void set_frame_start(uint32_t address) { frame_start_ = address; }
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void set_buffer_start(uint32_t address) { buffer_start_ = address; }
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void set_buffer_end(uint32_t address) { buffer_end_ = address; }
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void set_cursor_start(uint32_t address) { cursor_start_ = address; }
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private:
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Log::Logger<Log::Source::ARMIOC> logger;
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@ -182,6 +169,13 @@ private:
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// TODO: real video output.
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uint32_t position_ = 0;
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// Addresses.
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uint32_t buffer_start_;
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uint32_t buffer_end_;
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uint32_t frame_start_;
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uint32_t cursor_start_;
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// Horizontal and vertical timing.
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struct Dimension {
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uint32_t period = 0;
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uint32_t sync_width = 0;
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@ -193,10 +187,17 @@ private:
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uint32_t cursor_end = 0;
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};
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Dimension horizontal_, vertical_;
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// An interrupt flag; more closely related to the interface by which
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// my implementation of the IOC picks up an interrupt request than
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// to hardware.
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bool entered_sync_ = false;
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int sub_clock_ = 0;
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int clock_divider_ = 0;
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// The divider that would need to be applied to a 24Mhz clock to
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// get half the current pixel clock; counting is in units of half
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// the pixel clock because that's the fidelity at which the programmer
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// places horizontal events — display start, end, sync period, etc.
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uint32_t clock_divider_ = 0;
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};
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}
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