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Fixes COP
vector, ensures WDM
skips a byte.
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commit
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@ -52,6 +52,9 @@ class Krom65816Tests: XCTestCase {
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machine.setValue(0x00ff, for: .stackPointer)
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machine.setValue(0x34, for: .flags)
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// There seems to be some Nintendo-special register at address 0x0000.
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machine.setValue(0xb5, forAddress: 0x0000)
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// Poke some fixed values for SNES registers to get past initial setup.
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machine.setValue(0x42, forAddress: 0x4210) // "RDNMI", apparently; this says: CPU version 2, vblank interrupt request.
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var allowNegativeError = false
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@ -435,7 +435,7 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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data_address_ = registers_.emulation_flag ? 0xfffe : 0xffe6;
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} else {
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// Implicitly: COP.
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data_address_ = registers_.emulation_flag ? 0xfff4 : 0xffe8;
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data_address_ = registers_.emulation_flag ? 0xfff4 : 0xffe4;
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}
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}
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@ -545,7 +545,9 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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}
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break;
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case NOP: break;
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case NOP: break;
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case WDM: ++registers_.pc; break;
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// The below attempt to obey the 8/16-bit mixed transfer rules
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// as documented in https://softpixel.com/~cwright/sianse/docs/65816NFO.HTM
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@ -867,7 +867,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x40 RTI s */ op(stack_rti, RTI);
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/* 0x41 EOR (d, x) */ op(direct_indexed_indirect, EOR);
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/* 0x42 WDM i */ op(implied, NOP);
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/* 0x42 WDM i */ op(implied, WDM);
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/* 0x43 EOR d, s */ op(stack_relative, EOR);
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/* 0x44 MVP xyc */ op(block_move, MVP);
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/* 0x45 EOR d */ op(direct, EOR);
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@ -193,7 +193,7 @@ enum Operation: uint8_t {
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// These are all implicit.
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CLC, CLD, CLI, CLV, DEX, DEY, INX, INY, NOP, SEC, SED, SEI,
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TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX,
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XCE, XBA,
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XCE, XBA, WDM,
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STP, WAI,
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