From 0b148504671ebdeb3c75029c7c70276e7904e173 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 24 Jun 2018 23:02:36 -0400 Subject: [PATCH 1/2] Corrects some comments. --- Processors/Z80/Implementation/Z80Storage.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Processors/Z80/Implementation/Z80Storage.cpp b/Processors/Z80/Implementation/Z80Storage.cpp index 5e0596efa..b82a16370 100644 --- a/Processors/Z80/Implementation/Z80Storage.cpp +++ b/Processors/Z80/Implementation/Z80Storage.cpp @@ -257,23 +257,23 @@ void ProcessorStorage::assemble_ed_page(InstructionPage &target) { /* 0x42 SBC HL, BC */ SBC16(hl_, bc_), /* 0x43 LD (nn), BC */ StdInstr(Read16Inc(pc_, memptr_), Write16(memptr_, bc_)), /* 0x44 NEG */ StdInstr({MicroOp::NEG}), /* 0x45 RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x46 IM 0 */ StdInstr({MicroOp::IM}), /* 0x47 LD I, A */ Instr(6, {MicroOp::Move8, &a_, &ir_.bytes.high}), - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(bc_.bytes.low), + /* 0x48 IN C, (C); 0x49 OUT (C), C */ IN_OUT(bc_.bytes.low), /* 0x4a ADC HL, BC */ ADC16(hl_, bc_), /* 0x4b LD BC, (nn) */ StdInstr(Read16Inc(pc_, temp16_), Read16(temp16_, bc_)), /* 0x4c NEG */ StdInstr({MicroOp::NEG}), /* 0x4d RETI */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x4e IM 0/1 */ StdInstr({MicroOp::IM}), /* 0x4f LD R, A */ Instr(6, {MicroOp::Move8, &a_, &ir_.bytes.low}), - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.high), + /* 0x50 IN D, (C); 0x51 OUT (C), D */ IN_OUT(de_.bytes.high), /* 0x52 SBC HL, DE */ SBC16(hl_, de_), /* 0x53 LD (nn), DE */ StdInstr(Read16Inc(pc_, memptr_), Write16(memptr_, de_)), /* 0x54 NEG */ StdInstr({MicroOp::NEG}), /* 0x55 RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x56 IM 1 */ StdInstr({MicroOp::IM}), /* 0x57 LD A, I */ Instr(6, {MicroOp::Move8, &ir_.bytes.high, &a_}, {MicroOp::SetAFlags}), - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.low), + /* 0x58 IN E, (C); 0x59 OUT (C), E */ IN_OUT(de_.bytes.low), /* 0x5a ADC HL, DE */ ADC16(hl_, de_), /* 0x5b LD DE, (nn) */ StdInstr(Read16Inc(pc_, temp16_), Read16(temp16_, de_)), /* 0x5c NEG */ StdInstr({MicroOp::NEG}), /* 0x5d RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x5e IM 2 */ StdInstr({MicroOp::IM}), /* 0x5f LD A, R */ Instr(6, {MicroOp::Move8, &ir_.bytes.low, &a_}, {MicroOp::SetAFlags}), - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.high), + /* 0x60 IN H, (C); 0x61 OUT (C), H */ IN_OUT(hl_.bytes.high), /* 0x62 SBC HL, HL */ SBC16(hl_, hl_), /* 0x63 LD (nn), HL */ StdInstr(Read16Inc(pc_, memptr_), Write16(memptr_, hl_)), /* 0x64 NEG */ StdInstr({MicroOp::NEG}), /* 0x65 RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x66 IM 0 */ StdInstr({MicroOp::IM}), /* 0x67 RRD */ StdInstr(Read3(hl_, temp8_), InternalOperation(8), {MicroOp::RRD}, Write3(hl_, temp8_)), - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.low), + /* 0x68 IN L, (C); 0x69 OUT (C), L */ IN_OUT(hl_.bytes.low), /* 0x6a ADC HL, HL */ ADC16(hl_, hl_), /* 0x6b LD HL, (nn) */ StdInstr(Read16Inc(pc_, temp16_), Read16(temp16_, hl_)), /* 0x6c NEG */ StdInstr({MicroOp::NEG}), /* 0x6d RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x6e IM 0/1 */ StdInstr({MicroOp::IM}), /* 0x6f RLD */ StdInstr(Read3(hl_, temp8_), InternalOperation(8), {MicroOp::RLD}, Write3(hl_, temp8_)), @@ -281,12 +281,12 @@ void ProcessorStorage::assemble_ed_page(InstructionPage &target) { /* 0x72 SBC HL, SP */ SBC16(hl_, sp_), /* 0x73 LD (nn), SP */ StdInstr(Read16Inc(pc_, memptr_), Write16(memptr_, sp_)), /* 0x74 NEG */ StdInstr({MicroOp::NEG}), /* 0x75 RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x76 IM 1 */ StdInstr({MicroOp::IM}), /* 0x77 XX */ NOP, - /* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(a_), + /* 0x78 IN A, (C); 0x79 OUT (C), A */ IN_OUT(a_), /* 0x7a ADC HL, SP */ ADC16(hl_, sp_), /* 0x7b LD SP, (nn) */ StdInstr(Read16Inc(pc_, temp16_), Read16(temp16_, sp_)), /* 0x7c NEG */ StdInstr({MicroOp::NEG}), /* 0x7d RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}), /* 0x7e IM 2 */ StdInstr({MicroOp::IM}), /* 0x7f XX */ NOP, - NOP_ROW(), /* 0x80 */ - NOP_ROW(), /* 0x90 */ + NOP_ROW(), /* 0x80 ... 0x8f */ + NOP_ROW(), /* 0x90 ... 0x9f */ /* 0xa0 LDI */ StdInstr(Read3(hl_, temp8_), Write5(de_, temp8_), {MicroOp::LDI}), /* 0xa1 CPI */ StdInstr(Read3(hl_, temp8_), InternalOperation(10), {MicroOp::CPI}), /* 0xa2 INI */ Instr(6, Input(bc_, temp8_), Write3(hl_, temp8_), {MicroOp::INI}), From 59f8eeb05a8b13272e10ea04bd534cedcd45fa25 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 25 Jun 2018 20:48:24 -0400 Subject: [PATCH 2/2] Ensures the AY goes high impedance when not in read mode. --- Components/AY38910/AY38910.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Components/AY38910/AY38910.cpp b/Components/AY38910/AY38910.cpp index f02942449..fc8e8644e 100644 --- a/Components/AY38910/AY38910.cpp +++ b/Components/AY38910/AY38910.cpp @@ -276,8 +276,9 @@ void AY38910::set_control_lines(ControlLines control_lines) { } void AY38910::update_bus() { + data_output_ = 0xff; switch(control_state_) { - default: break; + default: break; case LatchAddress: select_register(data_input_); break; case Write: set_register_value(data_input_); break; case Read: data_output_ = get_register_value(); break;