diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj index 30c4d4bd2..1fdf6508d 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj +++ b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj @@ -213,6 +213,7 @@ 4B4DEC06252BFA56004583AC /* 65816Base.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B4DEC05252BFA56004583AC /* 65816Base.cpp */; }; 4B4DEC07252BFA56004583AC /* 65816Base.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B4DEC05252BFA56004583AC /* 65816Base.cpp */; }; 4B4DEC08252BFA56004583AC /* 65816Base.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B4DEC05252BFA56004583AC /* 65816Base.cpp */; }; + 4B4F47652533EA64004245B8 /* suite-a.prg in Resources */ = {isa = PBXBuildFile; fileRef = 4B4F475E2533EA64004245B8 /* suite-a.prg */; }; 4B50AF80242817F40099BBD7 /* QuartzCore.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 4B50AF7F242817F40099BBD7 /* QuartzCore.framework */; }; 4B54C0BC1F8D8E790050900F /* KeyboardMachine.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B54C0BB1F8D8E790050900F /* KeyboardMachine.cpp */; }; 4B54C0BF1F8D8F450050900F /* Keyboard.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B54C0BD1F8D8F450050900F /* Keyboard.cpp */; }; @@ -1128,6 +1129,7 @@ 4B4DEC18252BFA9C004583AC /* 6502Esque.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 6502Esque.hpp; sourceTree = ""; }; 4B4DEC19252BFB5A004583AC /* LazyFlags.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = LazyFlags.hpp; sourceTree = ""; }; 4B4F2B7024DF99D4000DA6B0 /* CSScanTarget+CppScanTarget.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = "CSScanTarget+CppScanTarget.h"; sourceTree = ""; }; + 4B4F475E2533EA64004245B8 /* suite-a.prg */ = {isa = PBXFileReference; lastKnownFileType = file; path = "suite-a.prg"; sourceTree = ""; }; 4B50AF7F242817F40099BBD7 /* QuartzCore.framework */ = {isa = PBXFileReference; lastKnownFileType = wrapper.framework; name = QuartzCore.framework; path = System/Library/Frameworks/QuartzCore.framework; sourceTree = SDKROOT; }; 4B51F70920A521D700AFA2C1 /* Source.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Source.hpp; sourceTree = ""; }; 4B51F70A20A521D700AFA2C1 /* Observer.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Observer.hpp; sourceTree = ""; }; @@ -1993,6 +1995,7 @@ 4B9F11CB22729B3500701480 /* OPCLOGR2.BIN */, 4B2530F2244E6773007980BF /* FM Synthesis */, 4BBF49B41ED2881600AB3669 /* FUSE */, + 4B4F475B2533EA64004245B8 /* jeek816 */, 4B670A822401CB8400D4E002 /* Patrik Rak Z80 Tests */, 4B9F11C72272375400701480 /* QL Startup */, 4B85322B227793CA00F26553 /* TOS Startup */, @@ -2482,6 +2485,14 @@ path = Implementation; sourceTree = ""; }; + 4B4F475B2533EA64004245B8 /* jeek816 */ = { + isa = PBXGroup; + children = ( + 4B4F475E2533EA64004245B8 /* suite-a.prg */, + ); + path = jeek816; + sourceTree = ""; + }; 4B51F70820A521D700AFA2C1 /* Activity */ = { isa = PBXGroup; children = ( @@ -4292,6 +4303,7 @@ 4BB299051B587D8400A49093 /* arrb in Resources */, 4BB299DC1B587D8400A49093 /* stazx in Resources */, 4B670A9D2401CB8400D4E002 /* z80ccf.tap in Resources */, + 4B4F47652533EA64004245B8 /* suite-a.prg in Resources */, 4BB299C41B587D8400A49093 /* sbca in Resources */, 4BB298F41B587D8400A49093 /* adcay in Resources */, 4B44EBF51DC987AF00A7820C /* AllSuiteA.bin in Resources */, diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/Makefile b/OSBindings/Mac/Clock SignalTests/jeek816/Makefile new file mode 100644 index 000000000..5e2f27fdc --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/Makefile @@ -0,0 +1,11 @@ + +F=suite-a + +all: $(F).prg + +$(F).prg: $(F).asm + acme --format plain -o $(F).prg -r $(F).r $(F).asm + +clean: + rm -f $(F).prg + rm -f *~ diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/RUN b/OSBindings/Mac/Clock SignalTests/jeek816/RUN new file mode 100644 index 000000000..d40f7f1b0 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/RUN @@ -0,0 +1,2 @@ +xscpu64 -scpu64 /usr/local/lib64/vice/SCPU64/scpu64 suite-a.prg +#xscpu64.devel -scpu64 /usr/local/lib64/vice/SCPU64/scpu64 suite-a.prg diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/license.txt b/OSBindings/Mac/Clock SignalTests/jeek816/license.txt new file mode 100644 index 000000000..3e374355c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/license.txt @@ -0,0 +1,24 @@ +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/readme.txt b/OSBindings/Mac/Clock SignalTests/jeek816/readme.txt new file mode 100644 index 000000000..e813527a4 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/readme.txt @@ -0,0 +1,23 @@ + +65C816 instruction set test + + +2017-12-13 J.E. Klasek j+816 AT klasek DOT at + + +ACME syntax, green border shows success. in case of failure red border +is shown and $0400 contains number of failed test and $0401 a bitmap +showing which tests actually failed. +If all tests fail on screen "f?" will be shown (corresponds to 6 failures) +and the bitmap %00111111 ($3F = '?') + +There are 6 tests (bit 5 to bit 0): + + STX $FFFF fails in 16 mode for X/Y if wrapping to location 0 + STY $FFFF fails in 16 mode for X/Y if wrapping to location 0 + LDX $FFFF,Y fails if wrapping to same bank + LDY $FFFF,X fails if wrapping to same bank + TRB $FFFF fails in 16 mode for A/M if wrapping to location 0 + TSB $FFFF fails in 16 mode for A/M if wrapping to location 0 + +------------------------------------------------------------------------------- diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.asm b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.asm new file mode 100644 index 000000000..bd291f75c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.asm @@ -0,0 +1,218 @@ +!cpu 65816 + +; 2017-12-13 J.E. Klasek j+816 AT klasek DOT at + + + +videoram = $0400 +colorram = $d800 + +;------------------------------------------------------------------------------- + *=$07ff + !word $0801 + !word bend + !word 10 + !byte $9e + !text "2061", 0 +bend: !word 0 +;------------------------------------------------------------------------------- + + sei + lda #$17 + sta $d018 + lda #$35 + sta $01 + lda #$7f + sta $dc0d + sta $dd0d + lda $dc0d + lda $dd0d + ldx #0 +- + lda #$20 + sta videoram,x + sta videoram+$0100,x + sta videoram+$0200,x + sta videoram+$0300,x + lda #1 + sta colorram,x + sta colorram+$0100,x + sta colorram+$0200,x + sta colorram+$0300,x + inx + bne - + + jmp start +theend: + sep #$30 ; 8-bit for X/Y and A/M + !as + !rs + lda $040210 + cmp #$ff + bne error + + lda #5 + sta $d020 + ldx #0 ; success + stx $d7ff + jmp * +error + sta $0400 + lda $040211 ; failure map (which test failed) + sta $0401 + lda #10 + sta $d020 + ldx #$ff ; failure + stx $d7ff + jmp * + +;------------------------------------------------------------------------------- + + * = $1000 +start: +; EXPECTED FINAL RESULTS: $0210 = FF +; (any other number will be the +; test that failed) + +; initialize: + lda #$00 + sta $040210 + sta $040211 + + +test00: + +; setup cpu + clc + xce ; native mode + rep #$30 ; 16-bit for X/Y and A/M + !al + !rl + +; setup registers + lda #$0404 ; Data Bank Register register + pha ; akku in 16 bit + plb ; pull DBR twice + plb + ldy #$8888 ; change marker + tyx + tya + +; setup memory + lda #$5555 ; wrap marker + sta $048887 ; into bank 4, for LDX/LDY + lda #$7777 ; no-wrap marker + sta $058887 ; into bank 5, for LDX/LDY + +;--------------------------------------------------------------------- + + stz $0000 ; init wrap marker + lda #$7777 ; no-wrap marker + sta $050000 ; to start of bank 5 + + sty $ffff ; high byte of Y is where? + lda $0000 + bne + + lda $ffff ; fetch, does not wrap + cmp #$8888 + bne + + lda $050000 + cmp #$7788 ; write to bank 5 + beq ++ ++ inc $0210 ; fail counter + clc +++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + stz $0000 ; init wrap marker + lda #$7777 ; no-wrap marker + sta $050000 ; to start of bank 5 + + tyx ; change marker + stx $ffff ; high byte of Y is where? + lda $0000 + bne + + lda $ffff ; fetch, does not wrap + cmp #$8888 + bne + + lda $050000 + cmp #$7788 ; write to bank 5 + beq ++ ++ inc $0210 ; fail counter + clc +++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + ldy $ffff,x ; Y=5555 Y=7777 value for Y comes from which bank? + cpy #$7777 + beq + + inc $0210 ; fail counter + clc ++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + txy ; reinitialize y + ldx $ffff,y ; X=5555 X=7777 value for X comes from which bank? + cpx #$7777 + beq + + inc $0210 ; fail counter + clc ++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + stz $0000 ; init wrap marker + lda #$7777 ; no-wrap marker + sta $050000 ; to start of bank 5 + + lda #$7788 + inc $0000 ; $0000 = 1 + trb $ffff ; 88 77 & ^(88 77) -> 00 00 + lda $0000 + cmp #$0001 ; $0000 not reset by trb (does not wrap) + bne + + lda $050000 + cmp #$7700 ; $050001 reset by trb + beq ++ ++ inc $0210 ; fail counter + clc +++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + lda #$7788 + sta $050000 ; 00 88 | 88 77 -> 88 ff + tsb $ffff ; set bits (which are already cleared) + lda $0000 + cmp #$0001 ; $0000 not set by tsb (does not wrap!) + bne + + lda $050000 + cmp #$77ff ; $050001 all bits set by tsb + beq ++ ++ inc $0210 ; fail counter + clc +++ + rol $0211 ; update failure map +;--------------------------------------------------------------------- + + +test00pass: + lda $0210 + eor #%0011111100000000 ; invert failure map + sta $0210 + bne + + dec $0210 ; 0 -> FF ++ + + lda #$0000 + pha + plb + plb ; program bank = 0 + sec + xce ; emulation mode + sep #$30 ; a/m, x/y 8 bit + + jmp theend diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.prg b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.prg new file mode 100644 index 000000000..3d0647382 Binary files /dev/null and b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.prg differ diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.r b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.r new file mode 100644 index 000000000..9b5e89c4e --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/suite-a.r @@ -0,0 +1,220 @@ + +; ******** Source: suite-a.asm + 1 !cpu 65816 + 2 + 3 ; 2017-12-13 J.E. Klasek j+816 AT klasek DOT at + 4 + 5 + 6 + 7 videoram = $0400 + 8 colorram = $d800 + 9 + 10 ;------------------------------------------------------------------------------- + 11 *=$07ff + 12 07ff 0108 !word $0801 + 13 0801 0b08 !word bend + 14 0803 0a00 !word 10 + 15 0805 9e !byte $9e + 16 0806 3230363100 !text "2061", 0 + 17 080b 0000 bend: !word 0 + 18 ;------------------------------------------------------------------------------- + 19 + 20 080d 78 sei + 21 080e a917 lda #$17 + 22 0810 8d18d0 sta $d018 + 23 0813 a935 lda #$35 + 24 0815 8501 sta $01 + 25 0817 a97f lda #$7f + 26 0819 8d0ddc sta $dc0d + 27 081c 8d0ddd sta $dd0d + 28 081f ad0ddc lda $dc0d + 29 0822 ad0ddd lda $dd0d + 30 0825 a200 ldx #0 + 31 - + 32 0827 a920 lda #$20 + 33 0829 9d0004 sta videoram,x + 34 082c 9d0005 sta videoram+$0100,x + 35 082f 9d0006 sta videoram+$0200,x + 36 0832 9d0007 sta videoram+$0300,x + 37 0835 a901 lda #1 + 38 0837 9d00d8 sta colorram,x + 39 083a 9d00d9 sta colorram+$0100,x + 40 083d 9d00da sta colorram+$0200,x + 41 0840 9d00db sta colorram+$0300,x + 42 0843 e8 inx + 43 0844 d0e1 bne - + 44 + 45 0846 4c0010 jmp start + 46 theend: + 47 0849 e230 sep #$30 ; 8-bit for X/Y and A/M + 48 !as + 49 !rs + 50 084b af100204 lda $040210 + 51 084f c9ff cmp #$ff + 52 0851 d00d bne error + 53 + 54 0853 a905 lda #5 + 55 0855 8d20d0 sta $d020 + 56 0858 a200 ldx #0 ; success + 57 085a 8effd7 stx $d7ff + 58 085d 4c5d08 jmp * + 59 error + 60 0860 8d0004 sta $0400 + 61 0863 af110204 lda $040211 ; failure map (which test failed) + 62 0867 8d0104 sta $0401 + 63 086a a90a lda #10 + 64 086c 8d20d0 sta $d020 + 65 086f a2ff ldx #$ff ; failure + 66 0871 8effd7 stx $d7ff + 67 0874 4c7408 jmp * + 68 + 69 ;------------------------------------------------------------------------------- + 70 + 71 * = $1000 + 72 start: + 73 ; EXPECTED FINAL RESULTS: $0210 = FF + 74 ; (any other number will be the + 75 ; test that failed) + 76 + 77 ; initialize: + 78 1000 a900 lda #$00 + 79 1002 8f100204 sta $040210 + 80 1006 8f110204 sta $040211 + 81 + 82 + 83 test00: + 84 + 85 ; setup cpu + 86 100a 18 clc + 87 100b fb xce ; native mode + 88 100c c230 rep #$30 ; 16-bit for X/Y and A/M + 89 !al + 90 !rl + 91 + 92 ; setup registers + 93 100e a90404 lda #$0404 ; Data Bank Register register + 94 1011 48 pha ; akku in 16 bit + 95 1012 ab plb ; pull DBR twice + 96 1013 ab plb + 97 1014 a08888 ldy #$8888 ; change marker + 98 1017 bb tyx + 99 1018 98 tya + 100 + 101 ; setup memory + 102 1019 a95555 lda #$5555 ; wrap marker + 103 101c 8f878804 sta $048887 ; into bank 4, for LDX/LDY + 104 1020 a97777 lda #$7777 ; no-wrap marker + 105 1023 8f878805 sta $058887 ; into bank 5, for LDX/LDY + 106 + 107 ;--------------------------------------------------------------------- + 108 + 109 1027 9c0000 stz $0000 ; init wrap marker + 110 102a a97777 lda #$7777 ; no-wrap marker + 111 102d 8f000005 sta $050000 ; to start of bank 5 + 112 + 113 1031 8cffff sty $ffff ; high byte of Y is where? + 114 1034 ad0000 lda $0000 + 115 1037 d011 bne + + 116 1039 adffff lda $ffff ; fetch, does not wrap + 117 103c c98888 cmp #$8888 + 118 103f d009 bne + + 119 1041 af000005 lda $050000 + 120 1045 c98877 cmp #$7788 ; write to bank 5 + 121 1048 f004 beq ++ + 122 104a ee1002 + inc $0210 ; fail counter + 123 104d 18 clc + 124 ++ + 125 104e 2e1102 rol $0211 ; update failure map + 126 ;--------------------------------------------------------------------- + 127 + 128 1051 9c0000 stz $0000 ; init wrap marker + 129 1054 a97777 lda #$7777 ; no-wrap marker + 130 1057 8f000005 sta $050000 ; to start of bank 5 + 131 + 132 105b bb tyx ; change marker + 133 105c 8effff stx $ffff ; high byte of Y is where? + 134 105f ad0000 lda $0000 + 135 1062 d011 bne + + 136 1064 adffff lda $ffff ; fetch, does not wrap + 137 1067 c98888 cmp #$8888 + 138 106a d009 bne + + 139 106c af000005 lda $050000 + 140 1070 c98877 cmp #$7788 ; write to bank 5 + 141 1073 f004 beq ++ + 142 1075 ee1002 + inc $0210 ; fail counter + 143 1078 18 clc + 144 ++ + 145 1079 2e1102 rol $0211 ; update failure map + 146 ;--------------------------------------------------------------------- + 147 + 148 107c bcffff ldy $ffff,x ; Y=5555 Y=7777 value for Y comes from which bank? + 149 107f c07777 cpy #$7777 + 150 1082 f004 beq + + 151 1084 ee1002 inc $0210 ; fail counter + 152 1087 18 clc + 153 + + 154 1088 2e1102 rol $0211 ; update failure map + 155 ;--------------------------------------------------------------------- + 156 + 157 108b 9b txy ; reinitialize y + 158 108c beffff ldx $ffff,y ; X=5555 X=7777 value for X comes from which bank? + 159 108f e07777 cpx #$7777 + 160 1092 f004 beq + + 161 1094 ee1002 inc $0210 ; fail counter + 162 1097 18 clc + 163 + + 164 1098 2e1102 rol $0211 ; update failure map + 165 ;--------------------------------------------------------------------- + 166 + 167 109b 9c0000 stz $0000 ; init wrap marker + 168 109e a97777 lda #$7777 ; no-wrap marker + 169 10a1 8f000005 sta $050000 ; to start of bank 5 + 170 + 171 10a5 a98877 lda #$7788 + 172 10a8 ee0000 inc $0000 ; $0000 = 1 + 173 10ab 1cffff trb $ffff ; 88 77 & ^(88 77) -> 00 00 + 174 10ae ad0000 lda $0000 + 175 10b1 c90100 cmp #$0001 ; $0000 not reset by trb (does not wrap) + 176 10b4 d009 bne + + 177 10b6 af000005 lda $050000 + 178 10ba c90077 cmp #$7700 ; $050001 reset by trb + 179 10bd f004 beq ++ + 180 10bf ee1002 + inc $0210 ; fail counter + 181 10c2 18 clc + 182 ++ + 183 10c3 2e1102 rol $0211 ; update failure map + 184 ;--------------------------------------------------------------------- + 185 + 186 10c6 a98877 lda #$7788 + 187 10c9 8f000005 sta $050000 ; 00 88 | 88 77 -> 88 ff + 188 10cd 0cffff tsb $ffff ; set bits (which are already cleared) + 189 10d0 ad0000 lda $0000 + 190 10d3 c90100 cmp #$0001 ; $0000 not set by tsb (does not wrap!) + 191 10d6 d009 bne + + 192 10d8 af000005 lda $050000 + 193 10dc c9ff77 cmp #$77ff ; $050001 all bits set by tsb + 194 10df f004 beq ++ + 195 10e1 ee1002 + inc $0210 ; fail counter + 196 10e4 18 clc + 197 ++ + 198 10e5 2e1102 rol $0211 ; update failure map + 199 ;--------------------------------------------------------------------- + 200 + 201 + 202 test00pass: + 203 10e8 ad1002 lda $0210 + 204 10eb 49003f eor #%0011111100000000 ; invert failure map + 205 10ee 8d1002 sta $0210 + 206 10f1 d003 bne + + 207 10f3 ce1002 dec $0210 ; 0 -> FF + 208 + + 209 + 210 10f6 a90000 lda #$0000 + 211 10f9 48 pha + 212 10fa ab plb + 213 10fb ab plb ; program bank = 0 + 214 10fc 38 sec + 215 10fd fb xce ; emulation mode + 216 10fe e230 sep #$30 ; a/m, x/y 8 bit + 217 + 218 1100 4c4908 jmp theend diff --git a/OSBindings/Mac/Clock SignalTests/jeek816/test-816.txt b/OSBindings/Mac/Clock SignalTests/jeek816/test-816.txt new file mode 100644 index 000000000..8fd95a640 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/jeek816/test-816.txt @@ -0,0 +1,147 @@ +65816 behavior on VICE and true hardware +======================================== + +Johann Klasek, j AT klasek at +2017-12-02 + + +Testenvironment: + + Hardware: + Tested on LTC64, a turbo card for the Commodore 64 + in-place of CPU 6510 (which moves to the card) + with a WDC's 65C816, 32 KByte ROM and 256 KByte RAM. + based on magazine article c't "C64 aufgemotzt", 1987/06 p. 94 + http://klasek.at/c64/ltc64 (german) + Redesigned and implemented by Christoph Egretzberger + and software integration by Johann Klasek + + Software: + Jamaica Monitor (Jammon) 4.1, native '816 + C64 ROMs (Kernal+BASIC) + +--------------------------------------------------------------------- +Case 1: Wrap-around for addressing mode "absolute" + for opcodes TSB, TRB, STX, STY, LDX, LDY + + VICE WDC +!e +a 1000 clc +xce native mode +rep #$30 16-bit for X/Y and A/M +lda #$0404 Data Bank Register register +pha akku in 16 bit +plb pull DBR twice +plb +lda #$7777 no-wrap marker +sta $050000 to bank 5 +sta $058887 +lda #$5555 unchanged marker +sta $048887 into bank 4 +ldy #$8888 change marker +tyx now in X and Y +sty $ffff high byte of Y is where? +ldy $ffff,x Y=5555 Y=7777 value for Y comes from which bank? +sty $0002 save as intermediate result, because we do more +lda $ffff A=7788 A=8888 fetch, does no wrap even on VICE +ldx $0000 X=2088 X=20b5 see if wrapping occured (from sty above) +eor #$ffff A=8877 A=7777 invert akku, 2nd part ... +trb $ffff M=0088 M=8888 reset bits (which are already cleared) +tsb $ffff M=88ff M=ffff set these bits giving a $ffff value +ldy $ffff Y=88ff Y=ffff back to ldy test +brk + +!d Jammon alternate display mode +d disassemble on current PC +m 04ffff show memory including 050000 +m 040000 start of bank 4 (wrap around area), + and intermediate result in 040002 +m 048887 X indexed wrap area +m 058887 X indexed no wrap area +z 1000 start single-stepping +z single step until BRK or ... +g go to BRK + +Results VICE WDC + +$050001 $77 $77 marker, never changed +$050000 $77 $ff modified by TRB/TSB +$04ffff $ff $ff modified by TRB/TSB +$040003 $55 $77 read value (low) from LDY $FFFF,X +$040002 $55 $77 read value (high) from LDY $FFFF,X + read value +$040000 $88 ?? (if no wrapping for STY $FFFF, TRB/TSB $FFFF) + only changed if wrapping +$058888 $77 $77 marker, never changed +$058887 $77 $77 marker, never changed +$048888 $55 $55 marker, never changed +$048887 $55 $55 marker, never changed + +A: $8877 $7777 value from $04ffff/$050000 after STY $FFFF +X: $??88 $???? value from $040000/$040001 with high byte of Y + in low byte of X after STY $FFFF +Y: $88ff $ffff value from TRB/TSB $FFFF + + + +--------------------------------------------------------------------- +Case 2: Wrap-around for Direct Page Indexed Addressing + in Emulation Mode + +### Variant 1 + +r +# set M X E to "1" +e +# set DBR to 00 + +a 1000 sec +xce emulation mode +lda #$20 set highbyte +xba +lda #$00 lowbyte 16-bit akku +tcd direct page address to $2000 +ldx #$20 index +lda #$88 marker for wrap +sta $2010 +lda #$77 marker for no-wrap +sta $2110 +lda $f0,x which marker? +stz $f0,x write (non-6502) +brk + +!d Jammon alternate display mode +d disassemble on PC +m 2010 show wrap area +m 2110 show no-wrap area +z 1000 start single-stepping +z single step until BRK or ... +g go to BRK + +Results VICE WDC + +$2010 00 00 wrap area: =00 from STZ +$2110 77 77 no-wrap area + +A: $2088 $2088 A low: 88 = wrap, 77 = no-wrap + + +### Variant 2 + +Based on variant 1: + +a 1005 lda #$01 direct page not aligned! +tcd direct page at $2001 +ldx #$1f correction to hit the + same memory locations + for monitoring + +g 1000 + +Results VICE WDC + +$2011 88 88 wrap area: =00 from STZ +$2111 00 00 no-wrap area + +A: $2077 $2077 A low: 88 = wrap, 77 = no-wrap + diff --git a/Processors/6502/AllRAM/6502AllRAM.cpp b/Processors/6502/AllRAM/6502AllRAM.cpp index 696701be8..620c5c24a 100644 --- a/Processors/6502/AllRAM/6502AllRAM.cpp +++ b/Processors/6502/AllRAM/6502AllRAM.cpp @@ -11,7 +11,7 @@ #include #include -//#define BE_NOISY +#define BE_NOISY using namespace CPU::MOS6502; @@ -46,14 +46,14 @@ template class ConcreteAllRAMProcessor: public AllRAMProcessor, publ *value = memory_[address]; #ifdef BE_NOISY // if((address&0xff00) == 0x100) { -// printf("%04x -> %02x\n", address, *value); + printf("%04x -> %02x\n", address, *value); // } #endif } else { memory_[address] = *value; #ifdef BE_NOISY // if((address&0xff00) == 0x100) { -// printf("%04x <- %02x\n", address, *value); + printf("%04x <- %02x\n", address, *value); // } #endif } diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 0f2b4e2b2..f1fb3f73d 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -227,6 +227,10 @@ template void Processor::run_for(const Cycles data_address_ = instruction_buffer_.value + data_bank_; continue; + case OperationConstructAbsoluteLong: + data_address_ = instruction_buffer_.value; + continue; + case OperationConstructAbsoluteIndexedIndirect: data_address_ = (instruction_buffer_.value + x()) & 0xffff; continue; diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 03cb4feca..a5c5c0f93 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -258,23 +258,22 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 4a. Absolute long; al. static void absolute_long(AccessType type, bool is8bit, const std::function &target) { - target(CycleFetchIncrementPC); // AAL. - target(CycleFetchIncrementPC); // AAH. - target(CycleFetchPC); // AAB. + target(CycleFetchIncrementPC); // AAL. + target(CycleFetchIncrementPC); // AAH. + target(CycleFetchIncrementPC); // AAB. - target(OperationConstructAbsolute); // Calculate data address. + target(OperationConstructAbsoluteLong); // Calculate data address. read_write(type, is8bit, target); } // 4b. Absolute long; al, JMP. static void absolute_long_jmp(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // New PCL. - target(CycleFetchIncrementPC); // New PCH. - target(CycleFetchPC); // New PBR. + target(CycleFetchIncrementPC); // New PCL. + target(CycleFetchIncrementPC); // New PCH. + target(CycleFetchPC); // New PBR. - target(OperationConstructAbsolute); // Calculate data address. - target(OperationPerform); // ['JMP' (though it's JML in internal terms)] + target(OperationPerform); // ['JMP' (though it's JML in internal terms)] } // 4c. Absolute long al, JSL. diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp index b294e9bcb..98a448dc0 100644 --- a/Processors/65816/Implementation/65816Storage.hpp +++ b/Processors/65816/Implementation/65816Storage.hpp @@ -55,6 +55,9 @@ enum MicroOp: uint8_t { /// using the data register as a high byte. OperationConstructAbsolute, + /// Sets the data address by copying the entire instruction buffer. + OperationConstructAbsoluteLong, + /// Sets the data address to the 16-bit result of adding x to the value in the instruction buffer. OperationConstructAbsoluteIndexedIndirect,