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Ensures that "Read/Modify/Write instructions absolute indexed in same page" take only six cycles on a 65C02.

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This commit is contained in:
Thomas Harte 2018-08-15 19:17:37 -04:00
parent c35dca783f
commit 6806193dc2
1 changed files with 13 additions and 2 deletions
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15
Processors/6502/Implementation/6502Storage.cpp
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@ -60,6 +60,9 @@ using namespace CPU::MOS6502;
#define IndexedIndirectReadModifyWrite(...) Program(IndexedIndirect, ReadModifyWrite(__VA_ARGS__))
#define IndirectIndexedReadModifyWrite(...) Program(IndirectIndexed, ReadModifyWrite(__VA_ARGS__))
#define FastAbsoluteXReadModifyWrite(...) Program(AbsoluteXr, ReadModifyWrite(__VA_ARGS__))
#define FastAbsoluteYReadModifyWrite(...) Program(AbsoluteYr, ReadModifyWrite(__VA_ARGS__))
#define Immediate(op) Program(OperationIncrementPC, op)
#define Implied(op) Program(OperationSTA, op, OperationCopyOperandToA)
@ -235,8 +238,6 @@ ProcessorStorage::ProcessorStorage(Personality personality) {
// Add BRA.
Install(0x80, Program(OperationBRA));
// Add NOPs.
// The 1-byte, 1-cycle (!) NOPs.
for(int c = 0x03; c <= 0xf3; c += 0x10) {
Install(c, ImpliedNop());
@ -293,6 +294,16 @@ ProcessorStorage::ProcessorStorage(Personality personality) {
Install(0x14, ZeroReadModifyWrite(OperationTRB));
Install(0x1c, AbsoluteReadModifyWrite(OperationTRB));
// Install faster ASL, LSR, ROL, ROR abs,[x/y]. Note: INC, DEC deliberately not improved.
Install(0x1e, FastAbsoluteXReadModifyWrite(OperationASL));
Install(0x1f, FastAbsoluteXReadModifyWrite(OperationASO));
Install(0x3e, FastAbsoluteXReadModifyWrite(OperationROL));
Install(0x3f, FastAbsoluteXReadModifyWrite(OperationRLA));
Install(0x5e, FastAbsoluteXReadModifyWrite(OperationLSR));
Install(0x5f, FastAbsoluteXReadModifyWrite(OperationLSE));
Install(0x7e, FastAbsoluteXReadModifyWrite(OperationROR));
Install(0x7f, FastAbsoluteXReadModifyWrite(OperationRRA, OperationADC));
if(has_bbrbbsrmbsmb(personality)) {
// Add BBS and BBR. These take five cycles. My guessed breakdown is:
// 1. read opcode