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https://github.com/TomHarte/CLK.git
synced 2025-08-09 05:25:01 +00:00
Add address rotation for applicable modes.
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@@ -818,7 +818,7 @@ void Base<personality>::commit_register(int reg, uint8_t value) {
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case 45:
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case 45:
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LOG("TODO: Yamaha VRAM bank selection addressing and command arguments; " << PADHEX(2) << +value);
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LOG("TODO: Yamaha VRAM bank selection addressing and command arguments; " << PADHEX(2) << +value);
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// b6: 0 = video RAM; 1 = expandion RAM.
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// b6: 0 = video RAM; 1 = expansion RAM.
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// b5: MXD (???)
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// b5: MXD (???)
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// b4: MXS
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// b4: MXS
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// b3: DIY
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// b3: DIY
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@@ -391,12 +391,25 @@ template <Personality personality> struct Base: public Storage<personality> {
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void do_external_slot(int access_column) {
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void do_external_slot(int access_column) {
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// Don't do anything if the required time for the access to become executable
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// Don't do anything if the required time for the access to become executable
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// has yet to pass.
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// has yet to pass.
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if(access_column < minimum_access_column_) {
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if(queued_access_ == MemoryAccess::None || access_column < minimum_access_column_) {
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return;
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return;
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}
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}
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size_t address = ram_pointer_;
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++ram_pointer_;
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if constexpr (is_yamaha_vdp(personality)) {
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const ScreenMode mode = current_screen_mode();
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if(mode == ScreenMode::YamahaGraphics6 || mode == ScreenMode::YamahaGraphics7) {
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// Rotate address one to the right as the hardware accesses
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// the underlying banks of memory alternately but presents
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// them as if linear.
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address = (address >> 1) | (address << 16);
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}
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}
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switch(queued_access_) {
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switch(queued_access_) {
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default: return;
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default: break;
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case MemoryAccess::Write:
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case MemoryAccess::Write:
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if constexpr (is_sega_vdp(personality)) {
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if constexpr (is_sega_vdp(personality)) {
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@@ -405,7 +418,7 @@ template <Personality personality> struct Base: public Storage<personality> {
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// scale; cf. https://www.retrorgb.com/sega-master-system-non-linear-blue-channel-findings.html
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// scale; cf. https://www.retrorgb.com/sega-master-system-non-linear-blue-channel-findings.html
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constexpr uint8_t rg_scale[] = {0, 85, 170, 255};
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constexpr uint8_t rg_scale[] = {0, 85, 170, 255};
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constexpr uint8_t b_scale[] = {0, 104, 170, 255};
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constexpr uint8_t b_scale[] = {0, 104, 170, 255};
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Storage<personality>::colour_ram_[ram_pointer_ & 0x1f] = palette_pack(
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Storage<personality>::colour_ram_[address & 0x1f] = palette_pack(
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rg_scale[(read_ahead_buffer_ >> 0) & 3],
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rg_scale[(read_ahead_buffer_ >> 0) & 3],
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rg_scale[(read_ahead_buffer_ >> 2) & 3],
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rg_scale[(read_ahead_buffer_ >> 2) & 3],
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b_scale[(read_ahead_buffer_ >> 4) & 3]
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b_scale[(read_ahead_buffer_ >> 4) & 3]
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@@ -427,17 +440,16 @@ template <Personality personality> struct Base: public Storage<personality> {
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dot.location.row += dot.location.column / 342;
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dot.location.row += dot.location.column / 342;
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dot.location.column %= 342;
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dot.location.column %= 342;
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dot.value = Storage<personality>::colour_ram_[ram_pointer_ & 0x1f];
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dot.value = Storage<personality>::colour_ram_[address & 0x1f];
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break;
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break;
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}
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}
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}
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}
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ram_[ram_pointer_ & memory_mask(personality)] = read_ahead_buffer_;
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ram_[address & memory_mask(personality)] = read_ahead_buffer_;
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break;
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break;
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case MemoryAccess::Read:
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case MemoryAccess::Read:
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read_ahead_buffer_ = ram_[ram_pointer_ & memory_mask(personality)];
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read_ahead_buffer_ = ram_[address & memory_mask(personality)];
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break;
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break;
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}
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}
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++ram_pointer_;
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queued_access_ = MemoryAccess::None;
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queued_access_ = MemoryAccess::None;
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}
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}
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