diff --git a/InstructionSets/M68k/Decoder.cpp b/InstructionSets/M68k/Decoder.cpp index 09bd19387..03febc0bf 100644 --- a/InstructionSets/M68k/Decoder.cpp +++ b/InstructionSets/M68k/Decoder.cpp @@ -581,6 +581,14 @@ template ::OpT op> uint32_t Predecoder::invali Ext, Ext >::value; + + case OpT(Operation::CHKorCMP2b): + case OpT(Operation::CHKorCMP2w): + case OpT(Operation::CHKorCMP2l): + return ~TwoOperandMask< + Ext, + ControlAddressingModes + >::value; } return InvalidOperands; @@ -1041,7 +1049,7 @@ template ::OpT op, bool validate> Preinstruction Pred // MARK: MOVES // // b0–b2 and b3–b5: effective address; - // also an extension word is present to dictate a a further register and a direction of transfer. + // also an extension word is present to dictate a further register and a direction of transfer. // case OpT(Operation::MOVESb): case OpT(Operation::MOVESw): case OpT(Operation::MOVESl): return validated( @@ -1174,6 +1182,9 @@ template ::OpT op, bool validate> Preinstruction Pred // There is also an immedate operand describing relevant registers. // case OpT(Operation::CASb): case OpT(Operation::CASw): case OpT(Operation::CASl): + case OpT(Operation::CHKorCMP2b): + case OpT(Operation::CHKorCMP2w): + case OpT(Operation::CHKorCMP2l): return validated( AddressingMode::ExtensionWord, 0, combined_mode(ea_mode, ea_register), ea_register); @@ -1282,15 +1293,11 @@ Preinstruction Predecoder::decode0(uint16_t instruction) { case 0xcc0: DecodeReq(model >= Model::M68020, Op::CASw); case 0xec0: DecodeReq(model >= Model::M68020, Op::CASl); - // 4-72 (p176) -// case 0x0c0: DecodeReq(model >= Model::M68020, Op::CHK2b); -// case 0x2c0: DecodeReq(model >= Model::M68020, Op::CHK2w); -// case 0x4c0: DecodeReq(model >= Model::M68020, Op::CHK2l); - - // 4-83 (p187) -// case 0x00c: DecodeReq(model >= Model::M68020, Op::CMP2b); -// case 0x04c: DecodeReq(model >= Model::M68020, Op::CMP2w); -// case 0x08c: DecodeReq(model >= Model::M68020, Op::CMP2l); + // 4-83 (p187) [CMP2] and 4-72 (p176) [CHK2]; + // the two are distinguished by a bit in the extension word. + case 0x0c0: DecodeReq(model >= Model::M68020, Op::CHKorCMP2b); + case 0x2c0: DecodeReq(model >= Model::M68020, Op::CHKorCMP2b); + case 0x4c0: DecodeReq(model >= Model::M68020, Op::CHKorCMP2b); // 6-24 (p478) case 0xe00: DecodeReq(model >= Model::M68010, Op::MOVESb); diff --git a/InstructionSets/M68k/Instruction.cpp b/InstructionSets/M68k/Instruction.cpp index 526ac0ee7..a1e85ce8e 100644 --- a/InstructionSets/M68k/Instruction.cpp +++ b/InstructionSets/M68k/Instruction.cpp @@ -128,10 +128,6 @@ const char *_to_string(Operation operation, bool is_quick) { case Operation::CMPw: return "CMP.w"; case Operation::CMPl: return "CMP.l"; - case Operation::CMP2b: return "CMP2.b"; - case Operation::CMP2w: return "CMP2.w"; - case Operation::CMP2l: return "CMP2.l"; - case Operation::CMPAw: return "CMPA.w"; case Operation::CMPAl: return "CMPA.l"; @@ -252,9 +248,9 @@ const char *_to_string(Operation operation, bool is_quick) { case Operation::TRAPV: return "TRAPV"; case Operation::CHKw: return "CHK"; - case Operation::CHK2b: return "CHK2.b"; - case Operation::CHK2w: return "CHK2.w"; - case Operation::CHK2l: return "CHK2.l"; + case Operation::CHKorCMP2b: return "[CHK/CMP]2.b"; + case Operation::CHKorCMP2w: return "[CHK/CMP]2.w"; + case Operation::CHKorCMP2l: return "[CHK/CMP]2.l"; case Operation::EXG: return "EXG"; case Operation::SWAP: return "SWAP"; diff --git a/InstructionSets/M68k/Instruction.hpp b/InstructionSets/M68k/Instruction.hpp index bf323bf71..592004c5a 100644 --- a/InstructionSets/M68k/Instruction.hpp +++ b/InstructionSets/M68k/Instruction.hpp @@ -132,8 +132,11 @@ enum class Operation: uint8_t { CASb, CASw, CASl, CAS2w, CAS2l, - CHK2b, CHK2w, CHK2l, - CMP2b, CMP2w, CMP2l, + // CHK2 and CMP2 are distinguished by their extension word; + // since this code deals in Preinstructions, i.e. as much + // as can be derived from the instruction word alone, in addition + // to the full things, the following enums result. + CHKorCMP2b, CHKorCMP2w, CHKorCMP2l, DIVSl, DIVUl, MULSl, MULUl, diff --git a/OSBindings/Mac/Clock SignalTests/68000 Decoding/68020ops.json b/OSBindings/Mac/Clock SignalTests/68000 Decoding/68020ops.json index 82734f9f7..da48d0670 100644 --- a/OSBindings/Mac/Clock SignalTests/68000 Decoding/68020ops.json +++ b/OSBindings/Mac/Clock SignalTests/68000 Decoding/68020ops.json @@ -207,14 +207,14 @@ "00cd": "None", "00ce": "None", "00cf": "None", - "00d0": "None", - "00d1": "None", - "00d2": "None", - "00d3": "None", - "00d4": "None", - "00d5": "None", - "00d6": "None", - "00d7": "None", + "00d0": "[CHK/CMP]2.b #, (A0)", + "00d1": "[CHK/CMP]2.b #, (A1)", + "00d2": "[CHK/CMP]2.b #, (A2)", + "00d3": "[CHK/CMP]2.b #, (A3)", + "00d4": "[CHK/CMP]2.b #, (A4)", + "00d5": "[CHK/CMP]2.b #, (A5)", + "00d6": "[CHK/CMP]2.b #, (A6)", + "00d7": "[CHK/CMP]2.b #, (A7)", "00d8": "None", "00d9": "None", "00da": "None", @@ -231,26 +231,26 @@ "00e5": "None", "00e6": "None", "00e7": "None", - "00e8": "None", - "00e9": "None", - "00ea": "None", - "00eb": "None", - "00ec": "None", - "00ed": "None", - "00ee": "None", - "00ef": "None", - "00f0": "None", - "00f1": "None", - "00f2": "None", - "00f3": "None", - "00f4": "None", - "00f5": "None", - "00f6": "None", - "00f7": "None", - "00f8": "None", - "00f9": "None", - "00fa": "None", - "00fb": "None", + "00e8": "[CHK/CMP]2.b #, (d16, A0)", + "00e9": "[CHK/CMP]2.b #, (d16, A1)", + "00ea": "[CHK/CMP]2.b #, (d16, A2)", + "00eb": "[CHK/CMP]2.b #, (d16, A3)", + "00ec": "[CHK/CMP]2.b #, (d16, A4)", + "00ed": "[CHK/CMP]2.b #, (d16, A5)", + "00ee": "[CHK/CMP]2.b #, (d16, A6)", + "00ef": "[CHK/CMP]2.b #, (d16, A7)", + "00f0": "[CHK/CMP]2.b #, (d8, A0, Xn)", + "00f1": "[CHK/CMP]2.b #, (d8, A1, Xn)", + "00f2": "[CHK/CMP]2.b #, (d8, A2, Xn)", + "00f3": "[CHK/CMP]2.b #, (d8, A3, Xn)", + "00f4": "[CHK/CMP]2.b #, (d8, A4, Xn)", + "00f5": "[CHK/CMP]2.b #, (d8, A5, Xn)", + "00f6": "[CHK/CMP]2.b #, (d8, A6, Xn)", + "00f7": "[CHK/CMP]2.b #, (d8, A7, Xn)", + "00f8": "[CHK/CMP]2.b #, (xxx).w", + "00f9": "[CHK/CMP]2.b #, (xxx).l", + "00fa": "[CHK/CMP]2.b #, (d16, PC)", + "00fb": "[CHK/CMP]2.b #, (d8, PC, Xn)", "00fc": "None", "00fd": "None", "00fe": "None", @@ -719,14 +719,14 @@ "02cd": "None", "02ce": "None", "02cf": "None", - "02d0": "None", - "02d1": "None", - "02d2": "None", - "02d3": "None", - "02d4": "None", - "02d5": "None", - "02d6": "None", - "02d7": "None", + "02d0": "[CHK/CMP]2.b #, (A0)", + "02d1": "[CHK/CMP]2.b #, (A1)", + "02d2": "[CHK/CMP]2.b #, (A2)", + "02d3": "[CHK/CMP]2.b #, (A3)", + "02d4": "[CHK/CMP]2.b #, (A4)", + "02d5": "[CHK/CMP]2.b #, (A5)", + "02d6": "[CHK/CMP]2.b #, (A6)", + "02d7": "[CHK/CMP]2.b #, (A7)", "02d8": "None", "02d9": "None", "02da": "None", @@ -743,26 +743,26 @@ "02e5": "None", "02e6": "None", "02e7": "None", - "02e8": "None", - "02e9": "None", - "02ea": "None", - "02eb": "None", - "02ec": "None", - "02ed": "None", - "02ee": "None", - "02ef": "None", - "02f0": "None", - "02f1": "None", - "02f2": "None", - "02f3": "None", - "02f4": "None", - "02f5": "None", - "02f6": "None", - "02f7": "None", - "02f8": "None", - "02f9": "None", - "02fa": "None", - "02fb": "None", + "02e8": "[CHK/CMP]2.b #, (d16, A0)", + "02e9": "[CHK/CMP]2.b #, (d16, A1)", + "02ea": "[CHK/CMP]2.b #, (d16, A2)", + "02eb": "[CHK/CMP]2.b #, (d16, A3)", + "02ec": "[CHK/CMP]2.b #, (d16, A4)", + "02ed": "[CHK/CMP]2.b #, (d16, A5)", + "02ee": "[CHK/CMP]2.b #, (d16, A6)", + "02ef": "[CHK/CMP]2.b #, (d16, A7)", + "02f0": "[CHK/CMP]2.b #, (d8, A0, Xn)", + "02f1": "[CHK/CMP]2.b #, (d8, A1, Xn)", + "02f2": "[CHK/CMP]2.b #, (d8, A2, Xn)", + "02f3": "[CHK/CMP]2.b #, (d8, A3, Xn)", + "02f4": "[CHK/CMP]2.b #, (d8, A4, Xn)", + "02f5": "[CHK/CMP]2.b #, (d8, A5, Xn)", + "02f6": "[CHK/CMP]2.b #, (d8, A6, Xn)", + "02f7": "[CHK/CMP]2.b #, (d8, A7, Xn)", + "02f8": "[CHK/CMP]2.b #, (xxx).w", + "02f9": "[CHK/CMP]2.b #, (xxx).l", + "02fa": "[CHK/CMP]2.b #, (d16, PC)", + "02fb": "[CHK/CMP]2.b #, (d8, PC, Xn)", "02fc": "None", "02fd": "None", "02fe": "None", @@ -1231,14 +1231,14 @@ "04cd": "None", "04ce": "None", "04cf": "None", - "04d0": "None", - "04d1": "None", - "04d2": "None", - "04d3": "None", - "04d4": "None", - "04d5": "None", - "04d6": "None", - "04d7": "None", + "04d0": "[CHK/CMP]2.b #, (A0)", + "04d1": "[CHK/CMP]2.b #, (A1)", + "04d2": "[CHK/CMP]2.b #, (A2)", + "04d3": "[CHK/CMP]2.b #, (A3)", + "04d4": "[CHK/CMP]2.b #, (A4)", + "04d5": "[CHK/CMP]2.b #, (A5)", + "04d6": "[CHK/CMP]2.b #, (A6)", + "04d7": "[CHK/CMP]2.b #, (A7)", "04d8": "None", "04d9": "None", "04da": "None", @@ -1255,26 +1255,26 @@ "04e5": "None", "04e6": "None", "04e7": "None", - "04e8": "None", - "04e9": "None", - "04ea": "None", - "04eb": "None", - "04ec": "None", - "04ed": "None", - "04ee": "None", - "04ef": "None", - "04f0": "None", - "04f1": "None", - "04f2": "None", - "04f3": "None", - "04f4": "None", - "04f5": "None", - "04f6": "None", - "04f7": "None", - "04f8": "None", - "04f9": "None", - "04fa": "None", - "04fb": "None", + "04e8": "[CHK/CMP]2.b #, (d16, A0)", + "04e9": "[CHK/CMP]2.b #, (d16, A1)", + "04ea": "[CHK/CMP]2.b #, (d16, A2)", + "04eb": "[CHK/CMP]2.b #, (d16, A3)", + "04ec": "[CHK/CMP]2.b #, (d16, A4)", + "04ed": "[CHK/CMP]2.b #, (d16, A5)", + "04ee": "[CHK/CMP]2.b #, (d16, A6)", + "04ef": "[CHK/CMP]2.b #, (d16, A7)", + "04f0": "[CHK/CMP]2.b #, (d8, A0, Xn)", + "04f1": "[CHK/CMP]2.b #, (d8, A1, Xn)", + "04f2": "[CHK/CMP]2.b #, (d8, A2, Xn)", + "04f3": "[CHK/CMP]2.b #, (d8, A3, Xn)", + "04f4": "[CHK/CMP]2.b #, (d8, A4, Xn)", + "04f5": "[CHK/CMP]2.b #, (d8, A5, Xn)", + "04f6": "[CHK/CMP]2.b #, (d8, A6, Xn)", + "04f7": "[CHK/CMP]2.b #, (d8, A7, Xn)", + "04f8": "[CHK/CMP]2.b #, (xxx).w", + "04f9": "[CHK/CMP]2.b #, (xxx).l", + "04fa": "[CHK/CMP]2.b #, (d16, PC)", + "04fb": "[CHK/CMP]2.b #, (d8, PC, Xn)", "04fc": "None", "04fd": "None", "04fe": "None", diff --git a/OSBindings/Mac/Clock SignalTests/68000DecoderTests.mm b/OSBindings/Mac/Clock SignalTests/68000DecoderTests.mm index c25e15cbf..f7525aeaf 100644 --- a/OSBindings/Mac/Clock SignalTests/68000DecoderTests.mm +++ b/OSBindings/Mac/Clock SignalTests/68000DecoderTests.mm @@ -83,7 +83,7 @@ template void test(NSString *filename, Class cls) { */ - (void)test68020 { - generate(); +// generate(); test(@"68020ops", [self class]); }