From 6ec291d96f16477d2358096ea8f8fb3cb7995d22 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Fri, 13 Oct 2023 15:34:06 -0400 Subject: [PATCH] Move ownership of mask test. --- .../x86/Implementation/PerformImplementation.hpp | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/InstructionSets/x86/Implementation/PerformImplementation.hpp b/InstructionSets/x86/Implementation/PerformImplementation.hpp index 88d129436..b6547de8d 100644 --- a/InstructionSets/x86/Implementation/PerformImplementation.hpp +++ b/InstructionSets/x86/Implementation/PerformImplementation.hpp @@ -934,11 +934,6 @@ inline void rcl(IntT &destination, uint8_t count, Status &status) { SIZE = 32: tempCOUNT ← COUNT AND 1FH; ESAC; */ - if constexpr (model != Model::i8086) { - count &= 0x1f; - } - auto temp_count = count % (Numeric::bit_size() + 1); - /* (* RCL instruction operation *) WHILE (tempCOUNT ≠ 0) @@ -959,6 +954,7 @@ inline void rcl(IntT &destination, uint8_t count, Status &status) { The OF flag is affected only for single- bit rotates (see “Description” above); it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected. */ + auto temp_count = count % (Numeric::bit_size() + 1); auto carry = status.carry_bit(); while(temp_count--) { const IntT temp_carry = (destination >> (Numeric::bit_size() - 1)) & 1; @@ -1025,10 +1021,11 @@ template < }; const auto shift_count = [&]() -> uint8_t { + static constexpr uint8_t mask = (model != Model::i8086) ? 0x1f : 0xff; switch(instruction.source().template source()) { case Source::None: return 1; - case Source::Immediate: return uint8_t(instruction.operand()); - default: return registers.cl(); + case Source::Immediate: return uint8_t(instruction.operand()) & mask; + default: return registers.cl() & mask; } };