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Move ownership of mask test.
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@ -934,11 +934,6 @@ inline void rcl(IntT &destination, uint8_t count, Status &status) {
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SIZE = 32: tempCOUNT ← COUNT AND 1FH;
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SIZE = 32: tempCOUNT ← COUNT AND 1FH;
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ESAC;
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ESAC;
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*/
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*/
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if constexpr (model != Model::i8086) {
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count &= 0x1f;
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}
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auto temp_count = count % (Numeric::bit_size<IntT>() + 1);
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/*
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/*
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(* RCL instruction operation *)
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(* RCL instruction operation *)
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WHILE (tempCOUNT ≠ 0)
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WHILE (tempCOUNT ≠ 0)
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@ -959,6 +954,7 @@ inline void rcl(IntT &destination, uint8_t count, Status &status) {
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The OF flag is affected only for single- bit rotates (see “Description” above);
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The OF flag is affected only for single- bit rotates (see “Description” above);
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it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected.
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it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected.
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*/
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*/
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auto temp_count = count % (Numeric::bit_size<IntT>() + 1);
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auto carry = status.carry_bit<IntT>();
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auto carry = status.carry_bit<IntT>();
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while(temp_count--) {
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while(temp_count--) {
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const IntT temp_carry = (destination >> (Numeric::bit_size<IntT>() - 1)) & 1;
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const IntT temp_carry = (destination >> (Numeric::bit_size<IntT>() - 1)) & 1;
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@ -1025,10 +1021,11 @@ template <
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};
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};
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const auto shift_count = [&]() -> uint8_t {
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const auto shift_count = [&]() -> uint8_t {
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static constexpr uint8_t mask = (model != Model::i8086) ? 0x1f : 0xff;
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switch(instruction.source().template source<false>()) {
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switch(instruction.source().template source<false>()) {
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case Source::None: return 1;
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case Source::None: return 1;
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case Source::Immediate: return uint8_t(instruction.operand());
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case Source::Immediate: return uint8_t(instruction.operand()) & mask;
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default: return registers.cl();
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default: return registers.cl() & mask;
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}
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}
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};
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};
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