From 7065ba4857b64abbc3793536e54aa9d5f0256a10 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 6 Oct 2020 21:24:43 -0400 Subject: [PATCH] Implements the single-byte branches. --- .../Implementation/65816Implementation.hpp | 40 ++++++++++++++++++- .../65816/Implementation/65816Storage.cpp | 4 +- .../65816/Implementation/65816Storage.hpp | 1 + 3 files changed, 42 insertions(+), 3 deletions(-) diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index fb81cf516..63f52288f 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -187,6 +187,15 @@ template void Processor::run_for(const Cycles } continue; + case OperationCopyPBRToData: + data_buffer_.size = 1; + data_buffer_.value = program_bank_ >> 16; + continue; + + case OperationCopyDataToPC: + pc_ = uint16_t(data_buffer_.value); + continue; + // // Address construction. // @@ -463,6 +472,33 @@ template void Processor::run_for(const Cycles flags_.set_nz(a_top()); break; + // + // Branches. + // + +#define BRA(condition) \ + if(!(condition)) { \ + next_op_ += 3; \ + } else { \ + data_buffer_.size = 2; \ + data_buffer_.value = pc_ + int8_t(data_buffer_.value); \ + \ + if((pc_ & 0xff00) == (data_buffer_.value & 0xff00)) { \ + ++next_op_; \ + } \ + } + + case BPL: BRA(!(flags_.negative_result&0x80)); break; + case BMI: BRA(flags_.negative_result&0x80); break; + case BVC: BRA(!flags_.overflow); break; + case BVS: BRA(flags_.overflow); break; + case BCC: BRA(!flags_.carry); break; + case BCS: BRA(flags_.carry); break; + case BNE: BRA(flags_.zero_result); break; + case BEQ: BRA(!flags_.zero_result); break; + case BRA: BRA(true); break; + +#undef BRA // TODO: // ADC, BIT, CMP, CPX, CPY, SBC, @@ -470,7 +506,7 @@ template void Processor::run_for(const Cycles // PHB, PHP, PHD, PHK, // ASL, LSR, ROL, ROR, TRB, TSB, // REP, SEP, - // BCC, BCS, BEQ, BMI, BNE, BPL, BRA, BVC, BVS, BRL, + // BRL, // TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX, // XCE, XBA, // STP, WAI, @@ -482,7 +518,7 @@ template void Processor::run_for(const Cycles } continue; - // TODO: OperationCopyPBRToData, OperationPrepareException + // TODO: OperationPrepareException default: assert(false); diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 2439f2189..23d3aee9f 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -549,12 +549,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor { static void relative(AccessType, bool, const std::function &target) { target(CycleFetchIncrementPC); // Offset - target(OperationPerform); // The branch instructions will all skip one or two + target(OperationPerform); // The branch instructions will all skip one or three // of the next cycles, depending on the effect of // the jump. target(CycleFetchPC); // IO target(CycleFetchPC); // IO + + target(OperationCopyDataToPC); // Install the address that was calculated above. } // 21. Relative long; rl. diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp index 63344665c..c3b13de60 100644 --- a/Processors/65816/Implementation/65816Storage.hpp +++ b/Processors/65816/Implementation/65816Storage.hpp @@ -111,6 +111,7 @@ enum MicroOp: uint8_t { /// Copies the current program counter to the data buffer. OperationCopyPCToData, OperationCopyInstructionToData, + OperationCopyDataToPC, /// Copies the current PBR to the data buffer. OperationCopyPBRToData,