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https://github.com/TomHarte/CLK.git
synced 2025-02-07 05:30:30 +00:00
Collapses nested conditionals.
This commit is contained in:
Thomas Harte
parent
edc8050b36
commit
73c38b3b0d
@ -184,226 +184,211 @@ class ConcreteMachine:
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memory_.access(uint16_t(address), is_read);
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const auto address_suffix = address & 0xffff;
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switch(address_suffix) {
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#define ReadWrite(x) (x) | (is_read * 0x10000)
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#define Read(x) (x) | 0x10000
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#define Write(x) (x)
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switch(ReadWrite(address_suffix)) {
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// New video register.
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case 0xc029:
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if(is_read) {
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*value = video_->get_new_video();;
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} else {
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video_->set_new_video(*value);
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case Read(0xc029):
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*value = video_->get_new_video();;
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break;
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case Write(0xc029):
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video_->set_new_video(*value);
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// TODO: I think bits 7 and 0 might also affect the memory map.
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// The descripton isn't especially clear — P.90 of the Hardware Reference.
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// Revisit if necessary.
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}
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// TODO: I think bits 7 and 0 might also affect the memory map.
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// The descripton isn't especially clear — P.90 of the Hardware Reference.
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// Revisit if necessary.
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break;
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// Video [and clock] interrupt register.
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case 0xc023:
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if(is_read) {
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*value = video_->get_interrupt_register();
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} else {
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video_->set_interrupt_register(*value);
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}
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case Read(0xc023):
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*value = video_->get_interrupt_register();
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break;
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case Write(0xc023):
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video_->set_interrupt_register(*value);
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break;
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// Video onterrupt-clear register.
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case 0xc032:
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if(!is_read) {
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video_->clear_interrupts(*value);
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}
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// Video interrupt-clear register.
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case Write(0xc032):
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video_->clear_interrupts(*value);
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break;
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// Shadow register.
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case 0xc035:
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if(is_read) {
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*value = memory_.get_shadow_register();
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} else {
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memory_.set_shadow_register(*value);
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}
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case Read(0xc035):
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*value = memory_.get_shadow_register();
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break;
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case Write(0xc035):
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memory_.set_shadow_register(*value);
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break;
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// Clock data.
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case 0xc033:
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if(is_read) {
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*value = clock_.get_data();
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} else {
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clock_.set_data(*value);
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}
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case Read(0xc033):
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*value = clock_.get_data();
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break;
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case Write(0xc033):
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clock_.set_data(*value);
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break;
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// Clock and border control.
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case 0xc034:
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if(is_read) {
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*value = clock_.get_control();
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} else {
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clock_.set_control(*value);
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video_->set_border_colour(*value);
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}
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case Read(0xc034):
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*value = clock_.get_control();
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break;
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case Write(0xc034):
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clock_.set_control(*value);
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video_->set_border_colour(*value);
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break;
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// Colour text control.
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case 0xc022:
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if(!is_read) {
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video_->set_text_colour(*value);
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}
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case Write(0xc022):
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video_->set_text_colour(*value);
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break;
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// Speed register.
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case 0xc036:
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if(is_read) {
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*value = speed_register_;
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printf("Reading speed register: %02x\n", *value);
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} else {
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memory_.set_speed_register(*value);
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speed_register_ = *value;
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printf("[Unimplemented] most of speed register: %02x\n", *value);
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}
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case Read(0xc036):
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*value = speed_register_;
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break;
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case Write(0xc036):
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memory_.set_speed_register(*value);
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speed_register_ = *value;
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printf("[Unimplemented] most of speed register: %02x\n", *value);
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break;
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// [Memory] State register.
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case 0xc068:
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if(is_read) {
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*value = memory_.get_state_register();
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} else {
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memory_.set_state_register(*value);
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}
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case Read(0xc068):
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*value = memory_.get_state_register();
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break;
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case Write(0xc068):
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memory_.set_state_register(*value);
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break;
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// Various independent memory switch reads [TODO: does the IIe-style keyboard provide the low seven?].
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#define SwitchRead(s) if(is_read) *value = memory_.s ? 0x80 : 0x00
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#define SwitchRead(s) *value = memory_.s ? 0x80 : 0x00
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#define LanguageRead(s) SwitchRead(language_card_switches().state().s)
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#define AuxiliaryRead(s) SwitchRead(auxiliary_switches().switches().s)
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#define VideoRead(s) if(is_read) *value = video_->s ? 0x80 : 0x00
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case 0xc011: LanguageRead(bank1); break;
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case 0xc012: LanguageRead(read); break;
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case 0xc013: AuxiliaryRead(read_auxiliary_memory); break;
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case 0xc014: AuxiliaryRead(write_auxiliary_memory); break;
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case 0xc015: AuxiliaryRead(internal_CX_rom); break;
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case 0xc016: AuxiliaryRead(alternative_zero_page); break;
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case 0xc017: AuxiliaryRead(slot_C3_rom); break;
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case 0xc018: VideoRead(get_80_store()); break;
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case 0xc019: VideoRead(get_is_vertical_blank()); break;
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case 0xc01a: VideoRead(get_text()); break;
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case 0xc01b: VideoRead(get_mixed()); break;
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case 0xc01c: VideoRead(get_page2()); break;
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case 0xc01d: VideoRead(get_high_resolution()); break;
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case 0xc01e: VideoRead(get_alternative_character_set()); break;
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case 0xc01f: VideoRead(get_80_columns()); break;
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case 0xc046: VideoRead(get_annunciator_3()); break;
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#define VideoRead(s) *value = video_->s ? 0x80 : 0x00
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case Read(0xc011): LanguageRead(bank1); break;
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case Read(0xc012): LanguageRead(read); break;
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case Read(0xc013): AuxiliaryRead(read_auxiliary_memory); break;
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case Read(0xc014): AuxiliaryRead(write_auxiliary_memory); break;
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case Read(0xc015): AuxiliaryRead(internal_CX_rom); break;
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case Read(0xc016): AuxiliaryRead(alternative_zero_page); break;
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case Read(0xc017): AuxiliaryRead(slot_C3_rom); break;
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case Read(0xc018): VideoRead(get_80_store()); break;
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case Read(0xc019): VideoRead(get_is_vertical_blank()); break;
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case Read(0xc01a): VideoRead(get_text()); break;
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case Read(0xc01b): VideoRead(get_mixed()); break;
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case Read(0xc01c): VideoRead(get_page2()); break;
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case Read(0xc01d): VideoRead(get_high_resolution()); break;
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case Read(0xc01e): VideoRead(get_alternative_character_set()); break;
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case Read(0xc01f): VideoRead(get_80_columns()); break;
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case Read(0xc046): VideoRead(get_annunciator_3()); break;
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#undef VideoRead
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#undef AuxiliaryRead
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#undef LanguageRead
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#undef SwitchRead
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// Video switches (and annunciators).
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case 0xc050: case 0xc051:
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case Read(0xc050): case Read(0xc051):
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case Write(0xc050): case Write(0xc051):
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video_->set_text(address & 1);
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break;
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case 0xc052: case 0xc053:
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case Read(0xc052): case Read(0xc053):
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case Write(0xc052): case Write(0xc053):
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video_->set_mixed(address & 1);
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break;
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case 0xc054: case 0xc055:
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case Read(0xc054): case Read(0xc055):
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case Write(0xc054): case Write(0xc055):
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video_->set_page2(address&1);
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break;
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case 0xc056: case 0xc057:
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case Read(0xc056): case Read(0xc057):
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case Write(0xc056): case Write(0xc057):
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video_->set_high_resolution(address&1);
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break;
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case 0xc058: case 0xc059:
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case 0xc05a: case 0xc05b:
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case 0xc05c: case 0xc05d:
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case Read(0xc058): case Read(0xc059):
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case Write(0xc058): case Write(0xc059):
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case Read(0xc05a): case Read(0xc05b):
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case Write(0xc05a): case Write(0xc05b):
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case Read(0xc05c): case Read(0xc05d):
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case Write(0xc05c): case Write(0xc05d):
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// Annunciators 0, 1 and 2.
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break;
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case 0xc05e: case 0xc05f:
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case Read(0xc05e): case Read(0xc05f):
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case Write(0xc05e): case Write(0xc05f):
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video_->set_annunciator_3(!(address&1));
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break;
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case 0xc001: /* 0xc000 is dealt with in the ADB section. */
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if(!is_read) video_->set_80_store(true);
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case Write(0xc000): case Write(0xc001):
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video_->set_80_store(address & 1);
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break;
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case 0xc00c: case 0xc00d:
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if(!is_read) video_->set_80_columns(address & 1);
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case Write(0xc00c): case Write(0xc00d):
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video_->set_80_columns(address & 1);
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break;
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case 0xc00e: case 0xc00f:
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if(!is_read) video_->set_alternative_character_set(address & 1);
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case Write(0xc00e): case Write(0xc00f):
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video_->set_alternative_character_set(address & 1);
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break;
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// ADB and keyboard.
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case 0xc000:
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if(is_read) {
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*value = adb_glu_.get_keyboard_data();
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} else {
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video_->set_80_store(false);
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}
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case Read(0xc000):
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*value = adb_glu_.get_keyboard_data();
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break;
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case 0xc010:
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case Read(0xc010):
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*value = adb_glu_.get_any_key_down() ? 0x80 : 0x00;
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[[fallthrough]];
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case Write(0xc010):
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adb_glu_.clear_key_strobe();
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if(is_read) {
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*value = adb_glu_.get_any_key_down() ? 0x80 : 0x00;
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}
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break;
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case 0xc024:
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if(is_read) {
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*value = adb_glu_.get_mouse_data();
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}
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case Read(0xc024):
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*value = adb_glu_.get_mouse_data();
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break;
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case 0xc025:
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if(is_read) {
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*value = adb_glu_.get_modifier_status();
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}
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case Read(0xc025):
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*value = adb_glu_.get_modifier_status();
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break;
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case 0xc026:
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if(is_read) {
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*value = adb_glu_.get_data();
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} else {
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adb_glu_.set_command(*value);
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}
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case Read(0xc026):
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*value = adb_glu_.get_data();
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break;
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case 0xc027:
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if(is_read) {
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*value = adb_glu_.get_status();
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} else {
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adb_glu_.set_status(*value);
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}
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case Write(0xc026):
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adb_glu_.set_command(*value);
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break;
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case Read(0xc027):
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*value = adb_glu_.get_status();
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break;
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case Write(0xc027):
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adb_glu_.set_status(*value);
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break;
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// The SCC.
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case 0xc038: case 0xc039: case 0xc03a: case 0xc03b:
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if(is_read) {
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*value = scc_.read(int(address));
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} else {
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scc_.write(int(address), *value);
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}
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case Read(0xc038): case Read(0xc039): case Read(0xc03a): case Read(0xc03b):
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*value = scc_.read(int(address));
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break;
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case Write(0xc038): case Write(0xc039): case Write(0xc03a): case Write(0xc03b):
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scc_.write(int(address), *value);
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break;
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// The audio GLU.
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case 0xc03c:
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if(is_read) {
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*value = sound_glu_.get_control();
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} else {
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sound_glu_.set_control(*value);
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}
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case Read(0xc03c):
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*value = sound_glu_.get_control();
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break;
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case 0xc03d:
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if(is_read) {
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*value = sound_glu_.get_data();
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} else {
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sound_glu_.set_data(*value);
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}
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case Write(0xc03c):
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sound_glu_.set_control(*value);
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break;
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case 0xc03e:
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if(is_read) {
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*value = sound_glu_.get_address_low();
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} else {
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sound_glu_.set_address_low(*value);
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}
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case Read(0xc03d):
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*value = sound_glu_.get_data();
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break;
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case 0xc03f:
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if(is_read) {
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*value = sound_glu_.get_address_high();
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} else {
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sound_glu_.set_address_high(*value);
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}
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case Write(0xc03d):
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sound_glu_.set_data(*value);
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break;
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case Read(0xc03e):
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*value = sound_glu_.get_address_low();
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break;
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case Write(0xc03e):
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sound_glu_.set_address_low(*value);
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break;
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case Read(0xc03f):
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*value = sound_glu_.get_address_high();
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break;
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case Write(0xc03f):
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sound_glu_.set_address_high(*value);
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break;
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@ -414,53 +399,47 @@ class ConcreteMachine:
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break;
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// Interrupt ROM addresses; Cf. P25 of the Hardware Reference.
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case 0xc071: case 0xc072: case 0xc073: case 0xc074: case 0xc075: case 0xc076: case 0xc077:
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case 0xc078: case 0xc079: case 0xc07a: case 0xc07b: case 0xc07c: case 0xc07d: case 0xc07e: case 0xc07f:
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if(is_read) {
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*value = rom_[rom_.size() - 65536 + address_suffix];
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}
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case Read(0xc071): case Read(0xc072): case Read(0xc073):
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case Read(0xc074): case Read(0xc075): case Read(0xc076): case Read(0xc077):
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case Read(0xc078): case Read(0xc079): case Read(0xc07a): case Read(0xc07b):
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case Read(0xc07c): case Read(0xc07d): case Read(0xc07e): case Read(0xc07f):
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*value = rom_[rom_.size() - 65536 + address_suffix];
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break;
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// Analogue inputs. All TODO.
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case 0xc060: case 0xc061: case 0xc062: case 0xc063:
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case Read(0xc060): case Read(0xc061): case Read(0xc062): case Read(0xc063):
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// Joystick buttons (and keyboard modifiers).
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if(is_read) {
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*value = 0x00;
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}
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*value = 0x00;
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break;
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case 0xc064: case 0xc065: case 0xc066: case 0xc067:
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case Read(0xc064): case Read(0xc065): case Read(0xc066): case Read(0xc067):
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// Analogue inputs.
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if(is_read) {
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*value = 0x00;
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}
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*value = 0x00;
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break;
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case 0xc070:
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case Read(0xc070): case Write(0xc070):
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// TODO: begin analogue channel charge.
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break;
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// Monochome/colour register.
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case 0xc021:
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case Read(0xc021):
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// "Uses bit 7 to determine whether composite output is colour 9) or gray scale (1)."
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if(is_read) {
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*value = video_->get_composite_is_colour() ? 0x00 : 0x80;
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} else {
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video_->set_composite_is_colour(!(*value & 0x80));
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}
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*value = video_->get_composite_is_colour() ? 0x00 : 0x80;
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break;
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case Write(0xc021):
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video_->set_composite_is_colour(!(*value & 0x80));
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break;
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// Language select. (?)
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case 0xc02b:
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if(is_read) {
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*value = language_;
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} else {
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language_ = *value;
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}
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case Read(0xc02b):
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*value = language_;
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break;
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case Write(0xc02b):
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language_ = *value;
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break;
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// Slot select.
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case 0xc02d:
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case Read(0xc02d):
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// b7: 0 = internal ROM code for slot 7;
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// b6: 0 = internal ROM code for slot 6;
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// b5: 0 = internal ROM code for slot 5;
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@ -469,20 +448,19 @@ class ConcreteMachine:
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// b2: internal ROM code for slot 2;
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// b1: internal ROM code for slot 1;
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// b0: reserved.
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if(is_read) {
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*value = card_mask_;
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} else {
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card_mask_ = *value;
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}
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*value = card_mask_;
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break;
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case Write(0xc02d):
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card_mask_ = *value;
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break;
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case 0xc030:
|
||||
case Read(0xc030): case Write(0xc030):
|
||||
update_audio();
|
||||
audio_toggle_.set_output(!audio_toggle_.get_output());
|
||||
break;
|
||||
|
||||
// Addresses that seemingly map to nothing; provided as a separate break out for now,
|
||||
// while I have an assert on unknown reads.
|
||||
// while I have an assert on unknown accesses.
|
||||
case 0xc049: case 0xc04a: case 0xc04b: case 0xc04c: case 0xc04d: case 0xc04e: case 0xc04f:
|
||||
case 0xc069: case 0xc06a: case 0xc06b: case 0xc06c:
|
||||
printf("Ignoring %04x\n", address_suffix);
|
||||
@ -490,35 +468,33 @@ class ConcreteMachine:
|
||||
break;
|
||||
|
||||
// 'Test Mode', whatever that is (?)
|
||||
case 0xc06e: case 0xc06f:
|
||||
case Read(0xc06e): case Read(0xc06f):
|
||||
case Write(0xc06e): case Write(0xc06f):
|
||||
test_mode_ = address & 1;
|
||||
break;
|
||||
case 0xc06d:
|
||||
if(is_read) {
|
||||
*value = test_mode_ * 0x80;
|
||||
}
|
||||
case Read(0xc06d):
|
||||
*value = test_mode_ * 0x80;
|
||||
break;
|
||||
|
||||
// Disk drive controls additional to the IWM.
|
||||
case 0xc031:
|
||||
case Read(0xc031):
|
||||
*value = disk_select_;
|
||||
break;
|
||||
case Write(0xc031):
|
||||
// b7: 0 = use head 0; 1 = use head 1.
|
||||
// b6: 0 = use 5.25" disks; 1 = use 3.5".
|
||||
if(!is_read) {
|
||||
disk_select_ = *value;
|
||||
iwm_->set_select(*value & 0x80);
|
||||
disk_select_ = *value;
|
||||
iwm_->set_select(*value & 0x80);
|
||||
|
||||
// Presumably bit 6 selects between two 5.25" drives rather than the two 3.5"?
|
||||
if(*value & 0x40) {
|
||||
iwm_->set_drive(0, &drives_[0]);
|
||||
iwm_->set_drive(1, &drives_[1]);
|
||||
} else {
|
||||
// TODO: add 5.25" drives.
|
||||
// (and any Smartport devices?)
|
||||
iwm_->set_drive(0, nullptr);
|
||||
iwm_->set_drive(1, nullptr);
|
||||
}
|
||||
// Presumably bit 6 selects between two 5.25" drives rather than the two 3.5"?
|
||||
if(*value & 0x40) {
|
||||
iwm_->set_drive(0, &drives_[0]);
|
||||
iwm_->set_drive(1, &drives_[1]);
|
||||
} else {
|
||||
*value = disk_select_;
|
||||
// TODO: add 5.25" drives.
|
||||
// (and any Smartport devices?)
|
||||
iwm_->set_drive(0, nullptr);
|
||||
iwm_->set_drive(1, nullptr);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -577,10 +553,13 @@ class ConcreteMachine:
|
||||
// TODO: disk-port soft switches should be in COEx.
|
||||
// log = true;
|
||||
}
|
||||
#undef ReadWrite
|
||||
#undef Read
|
||||
#undef Write
|
||||
} else {
|
||||
if(address_suffix < 0xc080) {
|
||||
// TODO: all other IO accesses.
|
||||
printf("Unhandled IO: %04x\n", address_suffix);
|
||||
printf("Unhandled IO %s: %04x\n", is_read ? "read" : "write", address_suffix);
|
||||
assert(false);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user