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Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view.
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@ -11,7 +11,7 @@
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#include <cstdio>
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using namespace Intel;
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using namespace Intel::i8272;
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#define SetDataRequest() (main_status_ |= 0x80)
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#define ResetDataRequest() (main_status_ &= ~0x80)
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@ -52,8 +52,9 @@ using namespace Intel;
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#define SetBadCylinder() (status_[2] |= 0x02)
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#define SetMissingDataAddressMark() (status_[2] |= 0x01)
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i8272::i8272(Cycles clock_rate, int clock_rate_multiplier, int revolutions_per_minute) :
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i8272::i8272(BusHandler &bus_handler, Cycles clock_rate, int clock_rate_multiplier, int revolutions_per_minute) :
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Storage::Disk::MFMController(clock_rate, clock_rate_multiplier, revolutions_per_minute),
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bus_handler_(bus_handler),
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main_status_(0),
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interesting_event_mask_((int)Event8272::CommandByte),
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resume_point_(0),
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@ -773,3 +774,9 @@ bool i8272::Drive::seek_is_satisfied() {
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return (target_head_position == head_position) ||
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(target_head_position == -1 && drive->get_is_track_zero());
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}
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void i8272::set_dma_acknowledge(bool dack) {
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}
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void i8272::set_terminal_count(bool tc) {
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}
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@ -13,22 +13,38 @@
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#include "../../Storage/Disk/Drive.hpp"
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#include <cstdint>
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#include <memory>
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#include <vector>
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namespace Intel {
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namespace i8272 {
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class BusHandler {
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public:
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virtual void set_dma_data_request(bool drq) {}
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virtual void set_interrupt(bool irq) {}
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};
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class i8272: public Storage::Disk::MFMController {
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public:
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i8272(Cycles clock_rate, int clock_rate_multiplier, int revolutions_per_minute);
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i8272(BusHandler &bus_handler, Cycles clock_rate, int clock_rate_multiplier, int revolutions_per_minute);
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void run_for(Cycles);
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void set_register(int address, uint8_t value);
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uint8_t get_register(int address);
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void set_dma_acknowledge(bool dack);
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void set_terminal_count(bool tc);
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void set_disk(std::shared_ptr<Storage::Disk::Disk> disk, int drive);
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private:
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// The bus handler, for interrupt and DMA-driven usage.
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BusHandler &bus_handler_;
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std::unique_ptr<BusHandler> allocated_bus_handler_;
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// Status registers.
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uint8_t main_status_;
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uint8_t status_[3];
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@ -110,6 +126,6 @@ class i8272: public Storage::Disk::MFMController {
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};
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}
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}
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#endif /* i8272_hpp */
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@ -438,12 +438,15 @@ struct KeyboardState {
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Wraps the 8272 so as to provide proper clocking and RPM counts, and just directly
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exposes motor control, applying the same value to all drives.
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*/
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class FDC: public Intel::i8272 {
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class FDC: public Intel::i8272::i8272 {
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private:
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Intel::i8272::BusHandler bus_handler_;
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public:
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FDC() : i8272(Cycles(8000000), 16, 300) {}
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FDC() : i8272(bus_handler_, Cycles(8000000), 16, 300) {}
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void set_motor_on(bool on) {
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Intel::i8272::set_motor_on(on);
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Intel::i8272::i8272::set_motor_on(on);
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}
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};
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