From 81431a5453f746ac4bb81299bc285f71766a88b1 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Fri, 20 May 2022 12:58:45 -0400
Subject: [PATCH] Attempt BTST, BCHG, BCLR and BSET.

---
 .../68000ComparativeTests.mm                  |  2 +-
 .../Implementation/68000Mk2Implementation.hpp | 67 +++++++++++++++++++
 .../Implementation/68000Mk2Storage.hpp        |  6 +-
 3 files changed, 73 insertions(+), 2 deletions(-)

diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
index be779f322..bb050c25a 100644
--- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
@@ -156,7 +156,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
 
 	// To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
 	_fileSet = [NSSet setWithArray:@[
-//		@"btst_bchg_bclr_bset.json",
+		@"btst_bchg_bclr_bset.json",
 
 		// Below this line are passing tests.
 		@"abcd_sbcd.json",
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 157b65858..f5ff8fb5d 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -98,6 +98,9 @@ enum ExecutionState: int {
 	Bcc_w_branch_not_taken,
 
 	BSR,
+
+	BCHG_BSET_Dn,
+	BCLR_Dn,
 };
 
 // MARK: - The state machine.
@@ -536,6 +539,43 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 				StdCASE(BSRb,	perform_state_ = BSR);
 				StdCASE(BSRw,	perform_state_ = BSR);
 
+				StdCASE(BTST, {
+					switch(instruction_.mode(1)) {
+						default:
+							perform_state_ = Perform_np;
+						break;
+						case Mode::DataRegisterDirect:
+						case Mode::ImmediateData:
+							perform_state_ = Perform_np_n;
+						break;
+					}
+				});
+
+				Duplicate(BCHG, BSET)
+				StdCASE(BSET, {
+					switch(instruction_.mode(1)) {
+						default:
+							perform_state_ = Perform_np;
+						break;
+						case Mode::DataRegisterDirect:
+						case Mode::ImmediateData:
+							perform_state_ = BCHG_BSET_Dn;
+						break;
+					}
+				});
+
+				StdCASE(BCLR, {
+					switch(instruction_.mode(1)) {
+						default:
+							perform_state_ = Perform_np;
+						break;
+						case Mode::DataRegisterDirect:
+						case Mode::ImmediateData:
+							perform_state_ = BCLR_Dn;
+						break;
+					}
+				});
+
 				default:
 					assert(false);
 			}
@@ -1213,6 +1253,29 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			Prefetch();		// np
 		MoveToState(Decode);
 
+		//
+		// BSET, BCHG, BCLR
+		//
+		BeginState(BCHG_BSET_Dn):
+			InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
+				instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
+
+			IdleBus(1 + did_bit_op_high_);
+			registers_[instruction_.reg(1)] = operand_[1];
+		MoveToState(Decode);
+
+		BeginState(BCLR_Dn):
+			InstructionSet::M68k::perform<
+				InstructionSet::M68k::Model::M68000,
+				ProcessorBase,
+				InstructionSet::M68k::Operation::BCLR
+			>(
+				instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
+
+			IdleBus(2 + did_bit_op_high_);
+			registers_[instruction_.reg(1)] = operand_[1];
+		MoveToState(Decode);
+
 		//
 		// Various states TODO.
 		//
@@ -1295,6 +1358,10 @@ void ProcessorBase::bsr(uint32_t offset) {
 	program_counter_.l = instruction_address_.l + offset + 2;
 }
 
+void ProcessorBase::did_bit_op(int bit_position) {
+	did_bit_op_high_ = bit_position > 15;
+}
+
 // MARK: - External state.
 
 template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
index 57ee1080a..9c553f8e0 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
@@ -87,6 +87,10 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 	/// Transient storage for exception processing.
 	SlicedInt16 captured_status_;
 
+	/// An internal flag used during BCHG, BSET and BCLR processing to
+	/// determine total operation cost.
+	bool did_bit_op_high_ = false;
+
 	// Flow controller... all TODO.
 	using Preinstruction = InstructionSet::M68k::Preinstruction;
 
@@ -106,7 +110,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 	inline void did_shift(int) {}
 	template <bool did_overflow> void did_divu(uint32_t, uint32_t) {}
 	template <bool did_overflow> void did_divs(int32_t, int32_t) {}
-	inline void did_bit_op(int) {}
+	inline void did_bit_op(int);
 	inline void did_update_status();
 	template <typename IntT> void complete_bcc(bool, IntT);
 	inline void complete_dbcc(bool, bool, int16_t);