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Corrects ADD HL, dd test.

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Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
This commit is contained in:
Thomas Harte 2021-04-08 22:23:15 -04:00
parent eacffa49f5
commit 818a4dff25
1 changed files with 7 additions and 7 deletions
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14
OSBindings/Mac/Clock SignalTests/Z80ContentionTests.mm
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@ -376,13 +376,13 @@ struct ContentionCheck {
[self validate48Contention:{
{initial_pc, 4},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
{initial_ir+1, 1},
} z80:z80];
[self validatePlus3Contention:{{initial_pc, 11}} z80:z80];
}