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Find first failing execution, note reason.
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2d17d9d316
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@ -118,10 +118,15 @@ inline void aam(CPU::RegisterPair16 &ax, uint8_t imm, Status &status) {
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The SF, ZF, and PF flags are set according to the result.
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The SF, ZF, and PF flags are set according to the result.
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The OF, AF, and CF flags are undefined.
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The OF, AF, and CF flags are undefined.
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*/
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*/
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/*
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If ... an immediate value of 0 is used, it will cause a #DE (divide error) exception.
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*/
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ax.halves.high = ax.halves.low / imm;
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ax.halves.high = ax.halves.low / imm;
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ax.halves.low = ax.halves.low % imm;
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ax.halves.low = ax.halves.low % imm;
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status.sign = ax.halves.low & 0x80;
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status.sign = ax.halves.low & 0x80;
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status.parity = status.zero = ax.halves.low;
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status.parity = status.zero = ax.halves.low;
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// TODO: #DE.
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}
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}
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inline void aas(CPU::RegisterPair16 &ax, Status &status) {
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inline void aas(CPU::RegisterPair16 &ax, Status &status) {
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@ -315,20 +315,23 @@ struct FlowController {
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if(assert) {
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if(assert) {
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XCTAssert(
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XCTAssert(
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statusEqual,
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statusEqual,
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"Status doesn't match — differs in %02x after %@",
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"Status doesn't match — differs in %02x after %@; executing %@",
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intended_status.get() ^ status.get(),
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intended_status.get() ^ status.get(),
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test[@"name"]
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test[@"name"],
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[self toString:decoded.second offsetLength:4 immediateLength:4]
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);
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);
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// TODO: should probably say more about the following two.
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// TODO: should probably say more about the following two.
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XCTAssert(
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XCTAssert(
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registersEqual,
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registersEqual,
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"Register mismatch after %@",
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"Register mismatch after %@; executing %@",
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test[@"name"]
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test[@"name"],
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[self toString:decoded.second offsetLength:4 immediateLength:4]
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);
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);
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XCTAssert(
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XCTAssert(
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ramEqual,
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ramEqual,
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"Memory contents mismatch after %@",
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"Memory contents mismatch after %@; executing %@",
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test[@"name"]
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test[@"name"],
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[self toString:decoded.second offsetLength:4 immediateLength:4]
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);
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);
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}
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}
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