Find first failing execution, note reason.

InstructionSets/x86/Implementation/PerformImplementation.hpp

@@ -118,10 +118,15 @@ inline void aam(CPU::RegisterPair16 &ax, uint8_t imm, Status &status) {
 		The SF, ZF, and PF flags are set according to the result.
 		The OF, AF, and CF flags are undefined.
 	*/
+	/*
+		If ... an immediate value of 0 is used, it will cause a #DE (divide error) exception.
+	*/
 	ax.halves.high = ax.halves.low / imm;
 	ax.halves.low = ax.halves.low % imm;
 	status.sign = ax.halves.low & 0x80;
 	status.parity = status.zero = ax.halves.low;
+
+	// TODO: #DE.
 }
 
 inline void aas(CPU::RegisterPair16 &ax, Status &status) {

OSBindings/Mac/Clock SignalTests/8088Tests.mm

@@ -315,20 +315,23 @@ struct FlowController {
 	if(assert) {
 		XCTAssert(
 			statusEqual,
-			"Status doesn't match — differs in %02x after %@",
+			"Status doesn't match — differs in %02x after %@; executing %@",
 				intended_status.get() ^ status.get(),
-				test[@"name"]
+				test[@"name"],
+				[self toString:decoded.second offsetLength:4 immediateLength:4]
 		);
 		// TODO: should probably say more about the following two.
 		XCTAssert(
 			registersEqual,
-			"Register mismatch after %@",
+			"Register mismatch after %@; executing %@",
-				test[@"name"]
+				test[@"name"],
+				[self toString:decoded.second offsetLength:4 immediateLength:4]
 		);
 		XCTAssert(
 			ramEqual,
-			"Memory contents mismatch after %@",
+			"Memory contents mismatch after %@; executing %@",
-				test[@"name"]
+				test[@"name"],
+				[self toString:decoded.second offsetLength:4 immediateLength:4]
 		);
 	}