6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-28 07:29:45 +00:00
Code Issues Projects Releases Wiki Activity

Moved line counter reset logic; I think this is actually correct.

Browse Source
This commit is contained in:
Thomas Harte 2017-07-09 00:05:30 -04:00
parent 4509c3ce34
commit 87658e83c1
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Machines/ZX8081/ZX8081.cpp
View File

@ -77,8 +77,10 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
case CPU::Z80::PartialMachineCycle::Output: case CPU::Z80::PartialMachineCycle::Output:
if(!(address & 2)) nmi_is_enabled_ = false; if(!(address & 2)) nmi_is_enabled_ = false;
if(!(address & 1)) nmi_is_enabled_ = is_zx81_; if(!(address & 1)) nmi_is_enabled_ = is_zx81_;
if((address&3) == 3) line_counter_ = 0;
if(!nmi_is_enabled_) { if(!nmi_is_enabled_) {
// Line counter reset is held low while vsync is active; simulate that lazily by performing
// an instant reset upon the transition from active to inactive.
if(vsync_) line_counter_ = 0;
set_vsync(false); set_vsync(false);
} }
break; break;