6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-04-22 09:37:21 +00:00
Code Issues Projects Releases Wiki Activity

Include possible clock divider.

Browse Source
This commit is contained in:
Thomas Harte 2024-12-11 21:57:31 -05:00
parent a487619578
commit 8854ffddee
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Machines/Commodore/Plus4/Video.hpp
View File

@ -80,7 +80,8 @@ public:
// if in PAL mode, divide input clock by 1.25 (?);
// see page 34 of plus4_tech.pdf for event times.
auto ticks_remaining = cycles.as<int>() * 8;
subcycles_ += cycles * 4;
auto ticks_remaining = subcycles_.divide(is_ntsc_ ? Cycles(4) : Cycles(5)).as<int>();
while(ticks_remaining) {
//
// Test vertical first; this will catch both any programmed change that has occurred outside
@ -240,6 +241,7 @@ public:
private:
Outputs::CRT::CRT crt_;
Cycles subcycles_;
// Programmable values.
bool extended_colour_mode_ = false;