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Fix condition.

This commit is contained in:
Thomas Harte 2024-03-03 14:40:05 -05:00
parent 9fd7d5c10f
commit 8a83d71560
2 changed files with 4 additions and 4 deletions

View File

@ -254,7 +254,7 @@ struct SingleDataTransfer: public WithShiftControlBits {
/// The base register index. i.e. 'Rn'.
int base() const { return (opcode_ >> 16) & 0xf; }
/// The immediate offset, if @c offset_is_immediate() was @c true; meaningless otherwise.
/// The immediate offset, if @c offset_is_register() was @c false; meaningless otherwise.
int immediate() const { return opcode_ & 0xfff; }
};

View File

@ -30,7 +30,7 @@ struct Memory {
template <typename IntT>
bool read(uint32_t address, IntT &source, Mode mode, bool trans) {
if(address > 0x3800000) {
if(address >= 0x3800000) {
has_moved_rom_ = true;
source = *reinterpret_cast<const IntT *>(&rom[address - 0x3800000]);
} else if(!has_moved_rom_) {
@ -202,7 +202,7 @@ struct Memory {
}
// TODO: turn the below into a trace-driven test case.
/*- (void)testROM319 {
- (void)testROM319 {
constexpr ROM::Name rom_name = ROM::Name::AcornRISCOS319;
ROM::Request request(rom_name);
const auto roms = CSROMFetcher()(request);
@ -217,6 +217,6 @@ struct Memory {
printf("%08x: %08x\n", executor.pc(), instruction);
execute<Model::ARMv2>(instruction, executor);
}
}*/
}
@end