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Tackles outstanding GCC warnings.

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This commit is contained in:
Thomas Harte 2020-11-22 21:43:56 -05:00
parent 4359fb1746
commit 8ace258fbc
3 changed files with 9 additions and 6 deletions
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2
Components/AppleClock/AppleClock.hpp
View File

@ -156,6 +156,8 @@ class ClockStorage {
phase_ = Phase::Command;
return DidComplete;
}
return NoResult;
}

7
Machines/Oric/Oric.cpp
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@ -763,10 +763,10 @@ Machine *Machine::Oric(const Analyser::Static::Target *target_hint, const ROMMac
#define DiskInterfaceSwitch(processor) \
switch(oric_target->disk_interface) { \
default: return new ConcreteMachine<DiskInterface::None, processor>(*oric_target, rom_fetcher); \
default: return new ConcreteMachine<DiskInterface::None, processor>(*oric_target, rom_fetcher); \
case DiskInterface::Microdisc: return new ConcreteMachine<DiskInterface::Microdisc, processor>(*oric_target, rom_fetcher); \
case DiskInterface::Pravetz: return new ConcreteMachine<DiskInterface::Pravetz, processor>(*oric_target, rom_fetcher); \
case DiskInterface::Jasmin: return new ConcreteMachine<DiskInterface::Jasmin, processor>(*oric_target, rom_fetcher); \
case DiskInterface::Pravetz: return new ConcreteMachine<DiskInterface::Pravetz, processor>(*oric_target, rom_fetcher); \
case DiskInterface::Jasmin: return new ConcreteMachine<DiskInterface::Jasmin, processor>(*oric_target, rom_fetcher); \
case DiskInterface::BD500: return new ConcreteMachine<DiskInterface::BD500, processor>(*oric_target, rom_fetcher); \
}
@ -777,6 +777,7 @@ Machine *Machine::Oric(const Analyser::Static::Target *target_hint, const ROMMac
#undef DiskInterfaceSwitch
return nullptr;
}
Machine::~Machine() {}

6
Processors/65816/Implementation/65816Implementation.hpp
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@ -276,7 +276,7 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
case OperationConstructAbsoluteXRead:
case OperationConstructAbsoluteX:
data_address_ = instruction_buffer_.value + registers_.x.full + registers_.data_bank;
incorrect_data_address_ = (data_address_ & 0xff) | (instruction_buffer_.value & 0xff00) + registers_.data_bank;
incorrect_data_address_ = ((data_address_ & 0x00ff) | (instruction_buffer_.value & 0xff00)) + registers_.data_bank;
// If the incorrect address isn't actually incorrect, skip its usage.
if(operation == OperationConstructAbsoluteXRead && data_address_ == incorrect_data_address_) {
@ -323,10 +323,10 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
continue;
case OperationConstructDirectIndexedIndirect:
data_address_ = registers_.data_bank + (
data_address_ = registers_.data_bank + ((
((registers_.direct + registers_.x.full + instruction_buffer_.value) & registers_.e_masks[1]) +
(registers_.direct & registers_.e_masks[0])
) & 0xffff;
) & 0xffff);
data_address_increment_mask_ = 0x00'ff'ff;
if(!(registers_.direct&0xff)) {