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Take another swing at R15 as a destination.

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This commit is contained in:
Thomas Harte 2024-03-12 09:13:05 -04:00
parent a5ebac1b29
commit 8b3c0abe93
2 changed files with 4 additions and 14 deletions
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16
InstructionSets/ARM/Executor.hpp
View File

@ -178,22 +178,12 @@ struct Executor {
break;
}
const bool writes_pc = !is_comparison(flags.operation()) && fields.destination() == 15;
if(writes_pc) {
if(!is_comparison(flags.operation()) && fields.destination() == 15) {
registers_.set_pc(pc_proxy);
}
if constexpr (flags.set_condition_codes()) {
// "When Rd is a register other than R15, the condition code flags in the PSR may be
// updated from the ALU flags as described above. When Rd is R15 and the S flag in
// the instruction is set, the PSR is overwritten by the corresponding ALU result.
//
// ... if the instruction is of a type which does not normally produce a result
// (CMP, CMN, TST, TEQ) but Rd is R15 and the S bit is set, the result will be used in
// this case to update those PSR flags which are not protected by virtue of the
// processor mode."
if(writes_pc) {
registers_.set_status(pc_proxy);
if(fields.destination() == 15) {
registers_.set_status(conditions);
} else {
// Set N and Z in a unified way.
registers_.set_nz(conditions);

2
Machines/Acorn/Archimedes/Archimedes.cpp
View File

@ -750,7 +750,7 @@ class ConcreteMachine:
all.insert(instruction);
if(executor_.pc() == 0x03801a0c) {
if(executor_.pc() == 0x03801a14) {
printf("");
}
// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);