6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-05 10:28:58 +00:00
Code Issues Projects Releases Wiki Activity

Corrects register-relative address calculation.

Browse Source
This commit is contained in:
Thomas Harte 2019-04-10 23:09:03 -04:00
parent a64948a2ba
commit 8e9d7c0f40
1 changed files with 12 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -59,7 +59,10 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
return;
} else {
std::cout << "Performing " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
std::cout << "Performing " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << '\t';
for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << data_[c].full << " ";
for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << address_[c].full << " ";
std::cout << std::endl;
}
active_program_ = &instructions[decoded_instruction_];
@ -697,16 +700,16 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
break;
case int(MicroOp::Action::CalcD16An) | MicroOp::SourceMask:
effective_address_[0] = int16_t(prefetch_queue_.halves.low.full) + active_program_->source->full;
effective_address_[0] = int16_t(prefetch_queue_.halves.low.full) + active_program_->source_address->full;
break;
case int(MicroOp::Action::CalcD16An) | MicroOp::DestinationMask:
effective_address_[1] = int16_t(prefetch_queue_.halves.low.full) + active_program_->destination->full;
effective_address_[1] = int16_t(prefetch_queue_.halves.low.full) + active_program_->destination_address->full;
break;
case int(MicroOp::Action::CalcD16An) | MicroOp::SourceMask | MicroOp::DestinationMask:
effective_address_[0] = int16_t(prefetch_queue_.halves.high.full) + active_program_->source->full;
effective_address_[1] = int16_t(prefetch_queue_.halves.low.full) + active_program_->destination->full;
effective_address_[0] = int16_t(prefetch_queue_.halves.high.full) + active_program_->source_address->full;
effective_address_[1] = int16_t(prefetch_queue_.halves.low.full) + active_program_->destination_address->full;
break;
#define CalculateD8AnXn(data, source, target) {\
@ -721,16 +724,16 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
} \
}
case int(MicroOp::Action::CalcD8AnXn) | MicroOp::SourceMask: {
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->source->full, effective_address_[0]);
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->source_address->full, effective_address_[0]);
} break;
case int(MicroOp::Action::CalcD8AnXn) | MicroOp::DestinationMask: {
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->destination->full, effective_address_[1]);
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->destination_address->full, effective_address_[1]);
} break;
case int(MicroOp::Action::CalcD8AnXn) | MicroOp::SourceMask | MicroOp::DestinationMask: {
CalculateD8AnXn(prefetch_queue_.halves.high, active_program_->source->full, effective_address_[0]);
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->destination->full, effective_address_[1]);
CalculateD8AnXn(prefetch_queue_.halves.high, active_program_->source_address->full, effective_address_[0]);
CalculateD8AnXn(prefetch_queue_.halves.low, active_program_->destination_address->full, effective_address_[1]);
} break;
case int(MicroOp::Action::CalcD8PCXn) | MicroOp::SourceMask: {