From 93c1f7fc905b420061674ac222b7d23974a61927 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Mon, 5 Sep 2022 22:00:04 -0400
Subject: [PATCH] Include prefetch in 68000 state.

---
 OSBindings/Mac/Clock SignalTests/68000OldVsNew.mm          | 2 ++
 Processors/68000Mk2/68000Mk2.hpp                           | 1 +
 .../68000Mk2/Implementation/68000Mk2Implementation.hpp     | 7 +++++++
 3 files changed, 10 insertions(+)

diff --git a/OSBindings/Mac/Clock SignalTests/68000OldVsNew.mm b/OSBindings/Mac/Clock SignalTests/68000OldVsNew.mm
index 5bfd534dd..2d8fc46d0 100644
--- a/OSBindings/Mac/Clock SignalTests/68000OldVsNew.mm	
+++ b/OSBindings/Mac/Clock SignalTests/68000OldVsNew.mm	
@@ -252,6 +252,8 @@ void print_state(FILE *target, const CPU::MC68000Mk2::State &state, const std::v
 	fprintf(target, "\"SR\": %u, ", state.registers.status);
 	fprintf(target, "\"PC\": %u, ", state.registers.program_counter - 4);
 
+	fprintf(target, "\"prefetch\": [%u, %u], ", state.prefetch[0], state.prefetch[1]);
+
 	fprintf(target, "\"ram\": [");
 
 	// Compute RAM from transactions; if this is the initial state then RAM should
diff --git a/Processors/68000Mk2/68000Mk2.hpp b/Processors/68000Mk2/68000Mk2.hpp
index 00269f06d..be908db02 100644
--- a/Processors/68000Mk2/68000Mk2.hpp
+++ b/Processors/68000Mk2/68000Mk2.hpp
@@ -354,6 +354,7 @@ class BusHandler {
 };
 
 struct State {
+	uint16_t prefetch[2];
 	InstructionSet::M68k::RegisterSet registers;
 };
 
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index f6d15c328..f03fe23fe 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -3025,6 +3025,9 @@ CPU::MC68000Mk2::State Processor<BusHandler, dtack_is_implicit, permit_overrun,
 	state.registers.user_stack_pointer = stack_pointers_[0].l;
 	state.registers.supervisor_stack_pointer = stack_pointers_[1].l;
 
+	state.prefetch[0] = prefetch_.high.w;
+	state.prefetch[1] = prefetch_.low.w;
+
 	return state;
 }
 
@@ -3048,6 +3051,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 
 	// Ensure the local is-supervisor flag is updated.
 	did_update_status();
+
+	// Populate the prefetch.
+	prefetch_.high.w = state.prefetch[0];
+	prefetch_.low.w = state.prefetch[1];
 }
 
 template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>