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Ensured correctly timed sampling of the interrupt line.
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commit
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@ -380,7 +380,7 @@ template <class T> class Processor {
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bool _ready_line_is_enabled;
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bool _ready_line_is_enabled;
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bool _reset_line_is_enabled;
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bool _reset_line_is_enabled;
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bool _irq_line_is_enabled, _irq_line_history[2];
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bool _irq_line_is_enabled, _irq_request_history[2];
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bool _nmi_line_is_enabled;
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bool _nmi_line_is_enabled;
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bool _ready_is_active;
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bool _ready_is_active;
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@ -446,7 +446,7 @@ template <class T> class Processor {
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schedule_program(get_reset_program());\
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schedule_program(get_reset_program());\
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else\
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else\
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{\
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{\
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if(_irq_line_history[1] && !_interruptFlag)\
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if(_irq_request_history[0])\
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schedule_program(get_irq_program());\
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schedule_program(get_irq_program());\
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else\
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else\
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schedule_program(fetch_decode_execute);\
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schedule_program(fetch_decode_execute);\
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@ -466,8 +466,8 @@ template <class T> class Processor {
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while (!_ready_is_active && _cycles_left_to_run > 0) {
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while (!_ready_is_active && _cycles_left_to_run > 0) {
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if (_nextBusOperation != BusOperation::None) {
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if (_nextBusOperation != BusOperation::None) {
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_irq_line_history[0] = _irq_line_history[1];
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_irq_request_history[0] = _irq_request_history[1];
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_irq_line_history[1] = _irq_line_is_enabled;
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_irq_request_history[1] = _irq_line_is_enabled && !_interruptFlag;
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_cycles_left_to_run -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
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_cycles_left_to_run -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
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_nextBusOperation = BusOperation::None;
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_nextBusOperation = BusOperation::None;
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}
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}
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