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Ensured correctly timed sampling of the interrupt line.

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This commit is contained in:
Thomas Harte 2016-01-10 22:55:56 -05:00
parent ccf20299a3
commit 93f7df04a0
1 changed files with 4 additions and 4 deletions
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8
Processors/6502/CPU6502.hpp
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@ -380,7 +380,7 @@ template <class T> class Processor {
bool _ready_line_is_enabled;
bool _reset_line_is_enabled;
bool _irq_line_is_enabled, _irq_line_history[2];
bool _irq_line_is_enabled, _irq_request_history[2];
bool _nmi_line_is_enabled;
bool _ready_is_active;
@ -446,7 +446,7 @@ template <class T> class Processor {
schedule_program(get_reset_program());\
else\
{\
if(_irq_line_history[1] && !_interruptFlag)\
if(_irq_request_history[0])\
schedule_program(get_irq_program());\
else\
schedule_program(fetch_decode_execute);\
@ -466,8 +466,8 @@ template <class T> class Processor {
while (!_ready_is_active && _cycles_left_to_run > 0) {
if (_nextBusOperation != BusOperation::None) {
_irq_line_history[0] = _irq_line_history[1];
_irq_line_history[1] = _irq_line_is_enabled;
_irq_request_history[0] = _irq_request_history[1];
_irq_request_history[1] = _irq_line_is_enabled && !_interruptFlag;
_cycles_left_to_run -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
_nextBusOperation = BusOperation::None;
}