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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-05 10:28:58 +00:00

Attempt a real slot-by-slot blit.

This commit is contained in:
Thomas Harte 2022-07-30 20:34:37 -04:00
parent 5d992758f8
commit 94a90b7a89
2 changed files with 123 additions and 119 deletions

View File

@ -223,8 +223,9 @@ uint16_t Blitter::get_status() {
bool Blitter::advance_dma() {
if(!height_) return false;
not_zero_flag_ = false;
if(line_mode_) {
not_zero_flag_ = false;
// As-yet unimplemented:
assert(b_data_ == 0xffff);
@ -332,20 +333,23 @@ bool Blitter::advance_dma() {
draw_ = true;
}
}
busy_ = false;
} else {
// Copy mode.
// Quick hack: do the entire action atomically.
if(!busy_) {
sequencer_.begin();
a32_ = 0;
b32_ = 0;
y_ = 0;
x_ = 0;
int loop_index_ = -1;
loop_index_ = -1;
write_phase_ = WritePhase::Starting;
not_zero_flag_ = 0;
busy_ = true;
}
while(true) {
const auto next = sequencer_.next();
// If this is the start of a new iteration, check for end of line,
@ -379,23 +383,22 @@ bool Blitter::advance_dma() {
case Channel::A:
a_data_ = ram_[pointer_[0] & ram_mask_];
pointer_[0] += direction_;
continue;
return true;
case Channel::B:
b_data_ = ram_[pointer_[1] & ram_mask_];
pointer_[1] += direction_;
continue;
return true;
case Channel::C:
c_data_ = ram_[pointer_[2] & ram_mask_];
pointer_[2] += direction_;
continue;
return true;
case Channel::None:
continue;
return false;
case Channel::Write: break;
case Channel::FlushPipeline:
// HACK. REMOVE ONCE NON-BLOCKING.
posit_interrupt(InterruptFlag::Blitter);
height_ = 0;
// END HACK.
busy_ = false;
if(write_phase_ == WritePhase::Full) {
ram_[write_address_ & ram_mask_] = write_value_;
@ -461,10 +464,9 @@ bool Blitter::advance_dma() {
write_address_ = pointer_[3];
write_value_ = output;
pointer_[3] += direction_;
continue;
return true;
default: break;
}
default: assert(false);
}
}

View File

@ -215,6 +215,8 @@ class Blitter: public DMADevice<4, 4> {
} write_phase_;
int y_, x_;
uint16_t transient_a_mask_;
bool busy_ = false;
int loop_index_ = -1;
};
}