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Extend what's held in the operation enum.
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Thomas Harte
parent
57b45076c5
commit
954d920b9e
@ -31,14 +31,23 @@ constexpr OperationTable<model> operation_table() {
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// Data processing; cf. p.17.
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if(((opcode >> 26) & 0b11) == 0b00) {
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result[c] = Operation((c >> 21) & 0xf);
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const auto operation = (c >> 21) & 0xf;
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if((opcode >> 20) & 1) {
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result[c] = Operation(int(Operation::ANDS) + operation);
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} else {
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result[c] = Operation(int(Operation::AND) + operation);
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}
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continue;
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}
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// Multiply and multiply-accumulate (MUL, MLA); cf. p.23.
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if(((opcode >> 22) & 0b111'111) == 0b000'000) {
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result[c] =
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((opcode >> 21) & 1) ? Operation::MLA : Operation::MUL;
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switch((opcode >> 20) & 3) {
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case 0: result[c] = Operation::MUL; break;
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case 1: result[c] = Operation::MULS; break;
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case 2: result[c] = Operation::MLA; break;
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case 3: result[c] = Operation::MLAS; break;
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}
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continue;
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}
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@ -91,8 +100,11 @@ constexpr Operation operation(uint32_t opcode) {
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// MUL and MLA have an extra constraint that doesn't fit the neat
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// 256-entry table format as above.
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//
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// Hope: most instructions aren't MUL/MLA so relying on the branch predictor
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// here is fine.
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if(
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(op == Operation::MUL || op == Operation::MLA)
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is_multiply(op)
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&& ((opcode >> 4) & 0b1111) != 0b1001
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) {
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return Operation::Undefined;
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@ -26,60 +26,117 @@ class Instruction {
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public:
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constexpr Instruction(uint32_t opcode) noexcept : opcode_(opcode) {}
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Condition condition() const { return Condition(opcode_ >> 28); }
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Operation operation() const {
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constexpr Condition condition() const { return Condition(opcode_ >> 28); }
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constexpr Operation operation() const {
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return InstructionSet::ARM::operation<model>(opcode_);
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}
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//
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// B and BL.
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//
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struct Branch {
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constexpr Branch(uint32_t opcode) noexcept : opcode_(opcode) {}
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/// Provides a 26-bit offset to add to the program counter for B and BL.
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uint32_t b_offset() const { return (opcode_ & 0xff'ffff) << 2; }
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/// Provides a 26-bit offset to add to the program counter for B and BL.
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uint32_t offset() const { return (opcode_ & 0xff'ffff) << 2; }
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private:
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uint32_t opcode_;
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};
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Branch branch() const { return Branch(opcode_); }
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//
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// Data processing (i.e. AND to MVN).
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//
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struct DataProcessing {
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constexpr DataProcessing(uint32_t opcode) noexcept : opcode_(opcode) {}
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/// @returns @c true if this operation should set condition codes; @c false otherwise.
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/// @note Valid for data processing and multiply/multiply-accumulate.
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bool set_condition_codes() const { return opcode_ & (1 << 20); }
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// TODO: could build this into the Operation?
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/// The destination register index.
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int destination() const { return (opcode_ >> 12) & 0xf; }
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/// The destination register index.
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int destination() const { return (opcode_ >> 12) & 0xf; }
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/// The operand 1 register index.
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int operand1() const { return (opcode_ >> 16) & 0xf; }
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/// The operand 1 register index.
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int operand1() const { return (opcode_ >> 16) & 0xf; }
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/// @returns @c true if operand 2 is defined by the @c rotate() and @c immediate() fields;
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/// @c false if it is defined by the @c shift_*() and @c operand2() fields.
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bool operand2_is_immediate() const { return opcode_ & (1 << 25); }
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/// @returns @c true if operand 2 is defined by the @c rotate() and @c immediate() fields;
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/// @c false if it is defined by the @c shift_*() and @c operand2() fields.
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bool operand2_is_immediate() const { return opcode_ & (1 << 25); }
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//
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// Register values for operand 2.
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//
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/// The operand 2 register index if @c operand2_is_immediate() is @c false; meaningless otherwise.
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int operand2() const { return opcode_ & 0xf; }
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/// The type of shift to apply to operand 2 if @c operand2_is_immediate() is @c false; meaningless otherwise.
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ShiftType shift_type() const { return ShiftType((opcode_ >> 5) & 3); }
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/// @returns @c true if the amount to shift by should be taken from a register; @c false if it is an immediate value.
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bool shift_count_is_register() const { return opcode_ & (1 << 4); }
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/// The shift amount register index if @c shift_count_is_register() is @c true; meaningless otherwise.
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int shift_register() const { return (opcode_ >> 8) & 0xf; }
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/// The amount to shift by if @c shift_count_is_register() is @c false; meaningless otherwise.
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int shift_amount() const { return (opcode_ >> 7) & 0x1f; }
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//
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// Immediate values for operand 2.
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//
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/// An 8-bit value to rotate right @c rotate() places if @c operand2_is_immediate() is @c true; meaningless otherwise.
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int immediate() const { return opcode_ & 0xff; }
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/// The number of bits to rotate @c immediate() by if @c operand2_is_immediate() is @c true; meaningless otherwise.
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int rotate() const { return (opcode_ >> 7) & 0x1e; }
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private:
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uint32_t opcode_;
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};
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DataProcessing data_processing() const { return DataProcessing(opcode_); }
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//
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// Register values for operand 2.
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// MUL and MLA.
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//
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struct Multiply {
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constexpr Multiply(uint32_t opcode) noexcept : opcode_(opcode) {}
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/// The operand 2 register index if @c operand2_is_immediate() is @c false; meaningless otherwise.
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int operand2() const { return opcode_ & 0xf; }
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/// The type of shift to apply to operand 2 if @c operand2_is_immediate() is @c false; meaningless otherwise.
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ShiftType shift_type() const { return ShiftType((opcode_ >> 5) & 3); }
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/// @returns @c true if the amount to shift by should be taken from a register; @c false if it is an immediate value.
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bool shift_count_is_register() const { return opcode_ & (1 << 4); }
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/// The shift amount register index if @c shift_count_is_register() is @c true; meaningless otherwise.
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int shift_register() const { return (opcode_ >> 8) & 0xf; }
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/// The amount to shift by if @c shift_count_is_register() is @c false; meaningless otherwise.
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int shift_amount() const { return (opcode_ >> 7) & 0x1f; }
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/// The destination register index. i.e. 'Rd'.
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int destination() const { return (opcode_ >> 16) & 0xf; }
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/// The accumulator register index for multiply-add. i.e. 'Rn'.
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int accumulator() const { return (opcode_ >> 12) & 0xf; }
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/// The multiplicand register index. i.e. 'Rs'.
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int multiplicand() const { return (opcode_ >> 8) & 0xf; }
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/// The multiplier register index. i.e. 'Rm'.
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int multiplier() const { return opcode_ & 0xf; }
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private:
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uint32_t opcode_;
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};
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Multiply multiply() const { return Multiply(opcode_); }
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//
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// Immediate values for operand 2.
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// LDR and STR.
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//
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struct SingleDataTransfer {
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constexpr SingleDataTransfer(uint32_t opcode) noexcept : opcode_(opcode) {}
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/// An 8-bit value to rotate right @c rotate() places if @c operand2_is_immediate() is @c true; meaningless otherwise.
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int immediate() const { return opcode_ & 0xff; }
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/// The number of bits to rotate @c immediate() by if @c operand2_is_immediate() is @c true; meaningless otherwise.
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int rotate() const { return (opcode_ >> 7) & 0x1e; }
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/// The destination register index. i.e. 'Rd' for LDR.
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int destination() const { return (opcode_ >> 12) & 0xf; }
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/// The destination register index. i.e. 'Rd' for STR.
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int source() const { return (opcode_ >> 12) & 0xf; }
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/// The base register index. i.e. 'Rn'.
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int base() const { return (opcode_ >> 16) & 0xf; }
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///
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int offset() const { return opcode_ & 0xfff; }
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// TODO: P, U, B, W, L, I.
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private:
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uint32_t opcode_;
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};
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private:
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uint32_t opcode_;
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@ -44,8 +44,40 @@ enum class Operation {
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/// Rd = NOT Op2.
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MVN,
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/// Rd = Op1 AND Op2.
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ANDS,
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/// Rd = Op1 EOR Op2.
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EORS,
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/// Rd = Op1 - Op2.
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SUBS,
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/// Rd = Op2 - Op1.
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RSBS,
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/// Rd = Op1 + Op2.
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ADDS,
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/// Rd = Op1 + Ord2 + C.
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ADCS,
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/// Rd = Op1 - Op2 + C.
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SBCS,
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/// Rd = Op2 - Op1 + C.
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RSCS,
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/// Set condition codes on Op1 AND Op2.
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TSTS,
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/// Set condition codes on Op1 EOR Op2.
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TEQS,
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/// Set condition codes on Op1 - Op2.
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CMPS,
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/// Set condition codes on Op1 + Op2.
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CMNS,
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/// Rd = Op1 OR Op2.
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ORRS,
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/// Rd = Op2
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MOVS,
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/// Rd = Op1 AND NOT Op2.
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BICS,
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/// Rd = NOT Op2.
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MVNS,
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B, BL,
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MUL, MLA,
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LDR, STR,
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LDM, STM,
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@ -55,8 +87,21 @@ enum class Operation {
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CoprocessorDataTransfer,
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Undefined,
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// These are kept at the end for a minor decoding win; they can be only partially decoded
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// with the table-based decoder used elsewhere so a special case checks more bits upon
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// a MUL or MLA and keeping these at the end of the enum allows a single conditional to
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// determine whether the extra decoding is needed.
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//
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// See is_multiply below.
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MUL, MLA,
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MULS, MLAS,
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};
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constexpr bool is_multiply(Operation op) {
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return op >= Operation::MUL;
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}
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enum class Condition {
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EQ, NE, CS, CC,
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MI, PL, VS, VC,
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