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Switched to a more authentic interfacing to the AY.

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This commit is contained in:
Thomas Harte 2016-10-18 19:32:15 -04:00
parent f6b6ec7009
commit 9669a5ec9b
3 changed files with 62 additions and 17 deletions
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38
Components/AY38910/AY38910.cpp
View File

@ -108,3 +108,41 @@ uint8_t AY38910::get_port_output(bool port_b)
{ {
return _registers[port_b ? 15 : 14]; return _registers[port_b ? 15 : 14];
} }
void AY38910::set_data_input(uint8_t r)
{
_data_input = r;
}
uint8_t AY38910::get_data_output()
{
return _data_output;
}
void AY38910::set_control_lines(ControlLines control_lines)
{
ControlState new_state;
switch((int)control_lines)
{
default: new_state = Inactive; break;
case (int)(BCDIR | BC2 | BC1):
case BCDIR:
case BC1: new_state = LatchAddress; break;
case (int)(BC2 | BC1): new_state = Read; break;
case (int)(BCDIR | BC2): new_state = Write; break;
}
if(new_state != _control_state)
{
_control_state = new_state;
switch(new_state)
{
default: break;
case LatchAddress: select_register(_data_input); break;
case Write: set_register_value(_data_input); break;
case Read: _data_output = get_register_value(); break;
}
}
}

24
Components/AY38910/AY38910.hpp
View File

@ -21,9 +21,14 @@ class AY38910: public ::Outputs::Filter<AY38910> {
void get_samples(unsigned int number_of_samples, int16_t *target); void get_samples(unsigned int number_of_samples, int16_t *target);
void skip_samples(unsigned int number_of_samples); void skip_samples(unsigned int number_of_samples);
void select_register(uint8_t r); enum ControlLines {
void set_register_value(uint8_t value); BC1 = (1 << 0),
uint8_t get_register_value(); BC2 = (1 << 1),
BCDIR = (1 << 2)
};
void set_data_input(uint8_t r);
uint8_t get_data_output();
void set_control_lines(ControlLines control_lines);
uint8_t get_port_output(bool port_b); uint8_t get_port_output(bool port_b);
@ -39,6 +44,19 @@ class AY38910: public ::Outputs::Filter<AY38910> {
int _envelope_divider; int _envelope_divider;
int _evelope_volume; int _evelope_volume;
int _channel_ouput[3]; int _channel_ouput[3];
enum ControlState {
Inactive,
LatchAddress,
Read,
Write
} _control_state;
void select_register(uint8_t r);
void set_register_value(uint8_t value);
uint8_t get_register_value();
uint8_t _data_input, _data_output;
}; };
}; };

17
Machines/Oric/Oric.hpp
View File

@ -119,8 +119,7 @@ class Machine:
} }
else else
{ {
_port_a_output = value; ay8910->set_data_input(value);
update_ay();
} }
} }
@ -132,7 +131,7 @@ class Machine:
} }
else else
{ {
return _port_a_input; return ay8910->get_data_output();
} }
} }
@ -152,18 +151,8 @@ class Machine:
void update_ay() void update_ay()
{ {
ay8910->run_for_cycles(_half_cycles_since_ay_update >> 1); ay8910->run_for_cycles(_half_cycles_since_ay_update >> 1);
_half_cycles_since_ay_update &= 1; ay8910->set_control_lines( (GI::AY38910::ControlLines)((_ay_bdir ? GI::AY38910::BCDIR : 0) | (_ay_bc1 ? GI::AY38910::BC1 : 0) | GI::AY38910::BC2));
if(_ay_bdir)
{
if(_ay_bc1) ay8910->select_register(_port_a_output);
else ay8910->set_register_value(_port_a_output);
}
else
{
if(_ay_bc1) _port_a_input = ay8910->get_register_value();
}
} }
uint8_t _port_a_output, _port_a_input;
bool _ay_bdir, _ay_bc1; bool _ay_bdir, _ay_bc1;
unsigned int _half_cycles_since_ay_update; unsigned int _half_cycles_since_ay_update;
}; };