6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-04-09 00:37:27 +00:00
Code Issues Projects Releases Wiki Activity

Introduce remainder of tests.

Browse Source
This commit is contained in:
Thomas Harte 2022-04-22 14:33:43 -04:00
parent e5a8d8b9ad
commit 96afcb7a43
2 changed files with 16 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
InstructionSets/68k/Decoder.cpp
View File

@ -119,6 +119,7 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
// NBCD.
case OpT(Operation::NBCD):
case OpT(Operation::MOVEfromSR):
case OpT(Operation::TAS):
switch(original.mode<0>()) {
default: return original;
@ -577,18 +578,18 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::decode(ui
case 0x08: return validated<op, validate>(
Preinstruction(operation,
AddressingMode::DataRegisterDirect, ea_register,
AddressingMode::DataRegisterDirect, data_register));
AddressingMode::DataRegisterDirect, data_register,
AddressingMode::DataRegisterDirect, ea_register));
case 0x09: return validated<op, validate>(
Preinstruction(operation,
AddressingMode::AddressRegisterDirect, ea_register,
AddressingMode::AddressRegisterDirect, data_register));
AddressingMode::AddressRegisterDirect, data_register,
AddressingMode::AddressRegisterDirect, ea_register));
case 0x11: return validated<op, validate>(
Preinstruction(operation,
AddressingMode::AddressRegisterDirect, ea_register,
AddressingMode::DataRegisterDirect, data_register));
AddressingMode::DataRegisterDirect, data_register,
AddressingMode::AddressRegisterDirect, ea_register));
}
//

18
OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm
View File

@ -253,19 +253,19 @@ template <int index> NSString *operand(Preinstruction instruction, uint16_t opco
case Operation::TRAPV: instruction = @"TRAPV"; break;
case Operation::CHK: instruction = @"CHK"; break;
/*
TODO:
case Operation::EXG: instruction = @"EXG"; break;
case Operation::SWAP: instruction = @"SWAP"; break;
EXG, SWAP,
case Operation::TAS: instruction = @"TAS"; break;
TAS,
case Operation::EXTbtow: instruction = @"EXT.w"; break;
case Operation::EXTwtol: instruction = @"EXT.l"; break;
EXTbtow, EXTwtol,
case Operation::LINKw: instruction = @"LINK"; break;
case Operation::UNLINK: instruction = @"UNLINK"; break;
LINKw, UNLINK,
STOP, RESET,
*/
case Operation::STOP: instruction = @"STOP"; break;
case Operation::RESET: instruction = @"RESET"; break;
// For now, skip any unmapped operations.
default: