From 96afcb7a4392100fe5a9efeb9e25860a617143a3 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Fri, 22 Apr 2022 14:33:43 -0400 Subject: [PATCH] Introduce remainder of tests. --- InstructionSets/68k/Decoder.cpp | 13 +++++++------ .../Mac/Clock SignalTests/m68kDecoderTests.mm | 18 +++++++++--------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/InstructionSets/68k/Decoder.cpp b/InstructionSets/68k/Decoder.cpp index 1b305a9a1..d6bf4f2d5 100644 --- a/InstructionSets/68k/Decoder.cpp +++ b/InstructionSets/68k/Decoder.cpp @@ -119,6 +119,7 @@ template Preinstruction Predecoder::validated // NBCD. case OpT(Operation::NBCD): case OpT(Operation::MOVEfromSR): + case OpT(Operation::TAS): switch(original.mode<0>()) { default: return original; @@ -577,18 +578,18 @@ template Preinstruction Predecoder::decode(ui case 0x08: return validated( Preinstruction(operation, - AddressingMode::DataRegisterDirect, ea_register, - AddressingMode::DataRegisterDirect, data_register)); + AddressingMode::DataRegisterDirect, data_register, + AddressingMode::DataRegisterDirect, ea_register)); case 0x09: return validated( Preinstruction(operation, - AddressingMode::AddressRegisterDirect, ea_register, - AddressingMode::AddressRegisterDirect, data_register)); + AddressingMode::AddressRegisterDirect, data_register, + AddressingMode::AddressRegisterDirect, ea_register)); case 0x11: return validated( Preinstruction(operation, - AddressingMode::AddressRegisterDirect, ea_register, - AddressingMode::DataRegisterDirect, data_register)); + AddressingMode::DataRegisterDirect, data_register, + AddressingMode::AddressRegisterDirect, ea_register)); } // diff --git a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm index 9f976e938..1f425573f 100644 --- a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm +++ b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm @@ -253,19 +253,19 @@ template NSString *operand(Preinstruction instruction, uint16_t opco case Operation::TRAPV: instruction = @"TRAPV"; break; case Operation::CHK: instruction = @"CHK"; break; - /* - TODO: + case Operation::EXG: instruction = @"EXG"; break; + case Operation::SWAP: instruction = @"SWAP"; break; - EXG, SWAP, + case Operation::TAS: instruction = @"TAS"; break; - TAS, + case Operation::EXTbtow: instruction = @"EXT.w"; break; + case Operation::EXTwtol: instruction = @"EXT.l"; break; - EXTbtow, EXTwtol, + case Operation::LINKw: instruction = @"LINK"; break; + case Operation::UNLINK: instruction = @"UNLINK"; break; - LINKw, UNLINK, - - STOP, RESET, - */ + case Operation::STOP: instruction = @"STOP"; break; + case Operation::RESET: instruction = @"RESET"; break; // For now, skip any unmapped operations. default: