6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-13 07:30:21 +00:00
Code Issues Projects Releases Wiki Activity

Adds failing ADD hl, dd test.

Browse Source
This commit is contained in:
Thomas Harte 2021-04-08 22:19:22 -04:00
parent 29cf80339a
commit 9e506c3206
1 changed files with 24 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
OSBindings/Mac/Clock SignalTests/Z80ContentionTests.mm
View File

@ -347,10 +347,10 @@ struct ContentionCheck {
- (void)testINCDEC16 {
for(uint8_t opcode : {
// INC rr
// INC dd
0x03, 0x13, 0x23, 0x33,
// DEC rr
// DEC dd
0x0b, 0x1b, 0x2b, 0x3b,
// LD SP, HL
@ -365,5 +365,27 @@ struct ContentionCheck {
}
}
- (void)testADDHLdd {
for(uint8_t opcode : {
// ADD hl, dd
0x09, 0x19, 0x29, 0x39,
}) {
const std::initializer_list<uint8_t> opcodes = {opcode};
CapturingZ80 z80(opcodes);
z80.run_for(11);
[self validate48Contention:{
{initial_pc, 4},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
{initial_ir, 1},
} z80:z80];
[self validatePlus3Contention:{{initial_pc, 11}} z80:z80];
}
}
@end