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Merge pull request #144 from TomHarte/HiRes
Corrects various ZX80/81 video deficiencies
This commit is contained in:
commit
a0367d6669
@ -76,6 +76,7 @@ void Video::set_sync(bool sync) {
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void Video::output_byte(uint8_t byte) {
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void Video::output_byte(uint8_t byte) {
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// Complete whatever was going on.
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// Complete whatever was going on.
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if(sync_) return;
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flush();
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flush();
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// Grab a buffer if one isn't already available.
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// Grab a buffer if one isn't already available.
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@ -25,7 +25,8 @@ Machine::Machine() :
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use_fast_tape_hack_(false),
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use_fast_tape_hack_(false),
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tape_advance_delay_(0),
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tape_advance_delay_(0),
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tape_is_automatically_playing_(false),
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tape_is_automatically_playing_(false),
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tape_is_playing_(false) {
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tape_is_playing_(false),
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has_latched_video_byte_(false) {
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set_clock_rate(ZX8081ClockRate);
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set_clock_rate(ZX8081ClockRate);
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tape_player_.set_motor_control(true);
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tape_player_.set_motor_control(true);
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clear_all_keys();
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clear_all_keys();
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@ -76,11 +77,11 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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case CPU::Z80::PartialMachineCycle::Output:
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case CPU::Z80::PartialMachineCycle::Output:
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if(!(address & 2)) nmi_is_enabled_ = false;
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if(!(address & 2)) nmi_is_enabled_ = false;
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if(!(address & 1)) nmi_is_enabled_ = is_zx81_;
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if(!(address & 1)) nmi_is_enabled_ = is_zx81_;
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if((address&3) == 3) {
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if(!nmi_is_enabled_) {
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if(!nmi_is_enabled_) {
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// Line counter reset is held low while vsync is active; simulate that lazily by performing
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set_vsync(false);
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// an instant reset upon the transition from active to inactive.
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line_counter_ = 0;
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if(vsync_) line_counter_ = 0;
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}
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set_vsync(false);
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}
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}
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break;
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break;
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@ -114,8 +115,8 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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set_interrupt_line(true, -2);
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set_interrupt_line(true, -2);
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set_interrupt_line(false);
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set_interrupt_line(false);
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}
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}
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if(latched_video_byte_) {
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if(has_latched_video_byte_) {
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size_t char_address = (size_t)((address & 0xff00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_);
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size_t char_address = (size_t)((address & 0xfe00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_);
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uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff;
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uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff;
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if(char_address < ram_base_) {
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if(char_address < ram_base_) {
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latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask;
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latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask;
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@ -124,7 +125,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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}
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}
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video_->output_byte(latched_video_byte_);
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video_->output_byte(latched_video_byte_);
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latched_video_byte_ = 0;
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has_latched_video_byte_ = false;
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}
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}
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break;
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break;
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@ -161,10 +162,11 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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uint8_t value = ram_[address & ram_mask_];
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uint8_t value = ram_[address & ram_mask_];
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// If this is an M1 cycle reading from above the 32kb mark and HALT is not
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// If this is an M1 cycle reading from above the 32kb mark and HALT is not
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// currently active, perform a video output and return a NOP. Otherwise,
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// currently active, latch for video output and return a NOP. Otherwise,
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// just return the value as read.
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// just return the value as read.
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if(is_opcode_read && address&0x8000 && !(value & 0x40) && !get_halt_line()) {
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if(is_opcode_read && address&0x8000 && !(value & 0x40) && !get_halt_line()) {
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latched_video_byte_ = value;
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latched_video_byte_ = value;
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has_latched_video_byte_ = true;
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*cycle.value = 0;
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*cycle.value = 0;
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} else *cycle.value = value;
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} else *cycle.value = value;
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}
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}
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@ -98,7 +98,9 @@ class Machine:
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bool is_zx81_;
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bool is_zx81_;
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bool nmi_is_enabled_;
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bool nmi_is_enabled_;
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int vsync_start_cycle_, vsync_end_cycle_;
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int vsync_start_cycle_, vsync_end_cycle_;
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uint8_t latched_video_byte_;
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uint8_t latched_video_byte_;
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bool has_latched_video_byte_;
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bool use_fast_tape_hack_;
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bool use_fast_tape_hack_;
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bool use_automatic_tape_motor_control_;
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bool use_automatic_tape_motor_control_;
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